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[src/trunk]: src/sys/arch/x68k/x68k 1. Add register prefix.
details: https://anonhg.NetBSD.org/src/rev/9904d3815222
branches: trunk
changeset: 500205:9904d3815222
user: itohy <itohy%NetBSD.org@localhost>
date: Fri Dec 08 02:59:12 2000 +0000
description:
1. Add register prefix.
2. movb #0x01,0x01800003@ -> movb #0x01,0x01800003 (found by tsutsui).
diffstat:
sys/arch/x68k/x68k/locore.s | 1112 +++++++++++++++++++++---------------------
1 files changed, 556 insertions(+), 556 deletions(-)
diffs (truncated from 1793 to 300 lines):
diff -r b183498901f4 -r 9904d3815222 sys/arch/x68k/x68k/locore.s
--- a/sys/arch/x68k/x68k/locore.s Fri Dec 08 02:33:44 2000 +0000
+++ b/sys/arch/x68k/x68k/locore.s Fri Dec 08 02:59:12 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.63 2000/11/26 11:47:27 jdolecek Exp $ */
+/* $NetBSD: locore.s,v 1.64 2000/12/08 02:59:12 itohy Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -91,161 +91,161 @@
ENTRY_NOPROFILE(buserr60) | XXX
tstl _C_LABEL(nofault) | device probe?
jeq Lberr | no, handle as usual
- movl _C_LABEL(nofault),sp@- | yes,
+ movl _C_LABEL(nofault),%sp@- | yes,
jbsr _C_LABEL(longjmp) | longjmp(nofault)
Lberr:
#if defined(M68040) || defined(M68060)
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040/060?
jne _C_LABEL(addrerr) | no, skip
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save user registers
- movl usp,a0 | save the user SP
- movl a0,sp@(FR_SP) | in the savearea
- lea sp@(FR_HW),a1 | grab base of HW berr frame
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save user registers
+ movl %usp,%a0 | save the user SP
+ movl %a0,%sp@(FR_SP) | in the savearea
+ lea %sp@(FR_HW),%a1 | grab base of HW berr frame
#if defined(M68060)
cmpl #CPU_68060,_C_LABEL(cputype) | 68060?
jne Lbenot060
- movel a1@(12),d0 | grap FSLW
- btst #2,d0 | branch prediction error?
+ movel %a1@(12),%d0 | grap FSLW
+ btst #2,%d0 | branch prediction error?
jeq Lnobpe | no, skip
- movc cacr,d1
- orl #IC60_CABC,d1 | clear all branch cache entries
- movc d1,cacr
- movl d0,d1
- andl #0x7ffd,d1 | check other faults
+ movc %cacr,%d1
+ orl #IC60_CABC,%d1 | clear all branch cache entries
+ movc %d1,%cacr
+ movl %d0,%d1
+ andl #0x7ffd,%d1 | check other faults
jeq _ASM_LABEL(faultstkadjnotrap)
Lnobpe:
| XXX this is not needed.
-| movl d0,sp@ | code is FSLW now.
+| movl %d0,%sp@ | code is FSLW now.
| we need to adjust for misaligned addresses
- movl a1@(8),d1 | grab VA
- btst #27,d0 | check for mis-aligned access
+ movl %a1@(8),%d1 | grab VA
+ btst #27,%d0 | check for mis-aligned access
jeq Lberr3 | no, skip
- addl #28,d1 | yes, get into next page
+ addl #28,%d1 | yes, get into next page
| operand case: 3,
| instruction case: 4+12+12
| XXX instr. case not done yet
- andl #PG_FRAME,d1 | and truncate
+ andl #PG_FRAME,%d1 | and truncate
Lberr3:
- movl d1,sp@- | push fault VA
- movl d0,sp@- | and FSLW
- andw #0x1f80,d0
+ movl %d1,%sp@- | push fault VA
+ movl %d0,%sp@- | and FSLW
+ andw #0x1f80,%d0
jeq Lisberr
jra Lismerr
Lbenot060:
#endif
- moveq #0,d0
- movw a1@(12),d0 | grab SSW
- movl a1@(20),d1 | and fault VA
- btst #11,d0 | check for mis-aligned access
+ moveq #0,%d0
+ movw %a1@(12),%d0 | grab SSW
+ movl %a1@(20),%d1 | and fault VA
+ btst #11,%d0 | check for mis-aligned access
jeq Lberr2 | no, skip
- addl #3,d1 | yes, get into next page
- andl #PG_FRAME,d1 | and truncate
+ addl #3,%d1 | yes, get into next page
+ andl #PG_FRAME,%d1 | and truncate
Lberr2:
- movl d1,sp@- | push fault VA
- movl d0,sp@- | and padded SSW
- btst #10,d0 | ATC bit set?
+ movl %d1,%sp@- | push fault VA
+ movl %d0,%sp@- | and padded SSW
+ btst #10,%d0 | ATC bit set?
jeq Lisberr | no, must be a real bus error
- movc dfc,d1 | yes, get MMU fault
- movc d0,dfc | store faulting function code
- movl sp@(4),a0 | get faulting address
+ movc %dfc,%d1 | yes, get MMU fault
+ movc %d0,%dfc | store faulting function code
+ movl %sp@(4),%a0 | get faulting address
.word 0xf568 | ptestr a0@
- movc d1,dfc
+ movc %d1,%dfc
.long 0x4e7a0805 | movc mmusr,d0
- movw d0,sp@ | save (ONLY LOW 16 BITS!)
+ movw %d0,%sp@ | save (ONLY LOW 16 BITS!)
jra Lismerr
#endif
ENTRY_NOPROFILE(addrerr)
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save user registers
- movl usp,a0 | save the user SP
- movl a0,sp@(FR_SP) | in the savearea
- lea sp@(FR_HW),a1 | grab base of HW berr frame
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save user registers
+ movl %usp,%a0 | save the user SP
+ movl %a0,%sp@(FR_SP) | in the savearea
+ lea %sp@(FR_HW),%a1 | grab base of HW berr frame
#if defined(M68040) || defined(M68060)
cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
jne Lbenot040 | no, skip
- movl a1@(8),sp@- | yes, push fault address
- clrl sp@- | no SSW for address fault
+ movl %a1@(8),%sp@- | yes, push fault address
+ clrl %sp@- | no SSW for address fault
jra Lisaerr | go deal with it
Lbenot040:
#endif
- moveq #0,d0
- movw a1@(10),d0 | grab SSW for fault processing
- btst #12,d0 | RB set?
+ moveq #0,%d0
+ movw %a1@(10),%d0 | grab SSW for fault processing
+ btst #12,%d0 | RB set?
jeq LbeX0 | no, test RC
- bset #14,d0 | yes, must set FB
- movw d0,a1@(10) | for hardware too
+ bset #14,%d0 | yes, must set FB
+ movw %d0,%a1@(10) | for hardware too
LbeX0:
- btst #13,d0 | RC set?
+ btst #13,%d0 | RC set?
jeq LbeX1 | no, skip
- bset #15,d0 | yes, must set FC
- movw d0,a1@(10) | for hardware too
+ bset #15,%d0 | yes, must set FC
+ movw %d0,%a1@(10) | for hardware too
LbeX1:
- btst #8,d0 | data fault?
+ btst #8,%d0 | data fault?
jeq Lbe0 | no, check for hard cases
- movl a1@(16),d1 | fault address is as given in frame
+ movl %a1@(16),%d1 | fault address is as given in frame
jra Lbe10 | thats it
Lbe0:
- btst #4,a1@(6) | long (type B) stack frame?
+ btst #4,%a1@(6) | long (type B) stack frame?
jne Lbe4 | yes, go handle
- movl a1@(2),d1 | no, can use save PC
- btst #14,d0 | FB set?
+ movl %a1@(2),%d1 | no, can use save PC
+ btst #14,%d0 | FB set?
jeq Lbe3 | no, try FC
- addql #4,d1 | yes, adjust address
+ addql #4,%d1 | yes, adjust address
jra Lbe10 | done
Lbe3:
- btst #15,d0 | FC set?
+ btst #15,%d0 | FC set?
jeq Lbe10 | no, done
- addql #2,d1 | yes, adjust address
+ addql #2,%d1 | yes, adjust address
jra Lbe10 | done
Lbe4:
- movl a1@(36),d1 | long format, use stage B address
- btst #15,d0 | FC set?
+ movl %a1@(36),%d1 | long format, use stage B address
+ btst #15,%d0 | FC set?
jeq Lbe10 | no, all done
- subql #2,d1 | yes, adjust address
+ subql #2,%d1 | yes, adjust address
Lbe10:
- movl d1,sp@- | push fault VA
- movl d0,sp@- | and padded SSW
- movw a1@(6),d0 | get frame format/vector offset
- andw #0x0FFF,d0 | clear out frame format
- cmpw #12,d0 | address error vector?
+ movl %d1,%sp@- | push fault VA
+ movl %d0,%sp@- | and padded SSW
+ movw %a1@(6),%d0 | get frame format/vector offset
+ andw #0x0FFF,%d0 | clear out frame format
+ cmpw #12,%d0 | address error vector?
jeq Lisaerr | yes, go to it
- movl d1,a0 | fault address
- movl sp@,d0 | function code from ssw
- btst #8,d0 | data fault?
+ movl %d1,%a0 | fault address
+ movl %sp@,%d0 | function code from ssw
+ btst #8,%d0 | data fault?
jne Lbe10a
- movql #1,d0 | user program access FC
+ movql #1,%d0 | user program access FC
| (we dont separate data/program)
- btst #5,a1@ | supervisor mode?
+ btst #5,%a1@ | supervisor mode?
jeq Lbe10a | if no, done
- movql #5,d0 | else supervisor program access
+ movql #5,%d0 | else supervisor program access
Lbe10a:
- ptestr d0,a0@,#7 | do a table search
- pmove psr,sp@ | save result
- movb sp@,d1
- btst #2,d1 | invalid? (incl. limit viol and berr)
+ ptestr %d0,%a0@,#7 | do a table search
+ pmove %psr,%sp@ | save result
+ movb %sp@,%d1
+ btst #2,%d1 | invalid? (incl. limit viol and berr)
jeq Lmightnotbemerr | no -> wp check
- btst #7,d1 | is it MMU table berr?
+ btst #7,%d1 | is it MMU table berr?
jeq Lismerr | no, must be fast
jra Lisberr1 | real bus err needs not be fast
Lmightnotbemerr:
- btst #3,d1 | write protect bit set?
+ btst #3,%d1 | write protect bit set?
jeq Lisberr1 | no, must be bus error
- movl sp@,d0 | ssw into low word of d0
- andw #0xc0,d0 | write protect is set on page:
- cmpw #0x40,d0 | was it read cycle?
+ movl %sp@,%d0 | ssw into low word of d0
+ andw #0xc0,%d0 | write protect is set on page:
+ cmpw #0x40,%d0 | was it read cycle?
jeq Lisberr1 | yes, was not WPE, must be bus err
Lismerr:
- movl #T_MMUFLT,sp@- | show that we are an MMU fault
+ movl #T_MMUFLT,%sp@- | show that we are an MMU fault
jra _ASM_LABEL(faultstkadj) | and deal with it
Lisaerr:
- movl #T_ADDRERR,sp@- | mark address error
+ movl #T_ADDRERR,%sp@- | mark address error
jra _ASM_LABEL(faultstkadj) | and deal with it
Lisberr1:
- clrw sp@ | re-clear pad word
+ clrw %sp@ | re-clear pad word
Lisberr:
- movl #T_BUSERR,sp@- | mark bus error
+ movl #T_BUSERR,%sp@- | mark bus error
jra _ASM_LABEL(faultstkadj) | and deal with it
/*
@@ -256,22 +256,22 @@
#if defined(M68040)
cmpl #FPU_68040,_C_LABEL(fputype) | 64040 FPU?
jne Lfp_unimp | no, skip FPSP
- cmpw #0x202c,sp@(6) | format type 2?
+ cmpw #0x202c,%sp@(6) | format type 2?
jne _C_LABEL(illinst) | no, not an FP emulation
#ifdef FPSP
jmp _ASM_LABEL(fpsp_unimp) | yes, go handle it
#else
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save registers
- moveq #T_FPEMULI,d0 | denote as FP emulation trap
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save registers
+ moveq #T_FPEMULI,%d0 | denote as FP emulation trap
jra _ASM_LABEL(fault) | do it
#endif
Lfp_unimp:
#endif
#ifdef FPU_EMULATE
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save registers
- moveq #T_FPEMULD,d0 | denote as FP emulation trap
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save registers
+ moveq #T_FPEMULD,%d0 | denote as FP emulation trap
jra _ASM_LABEL(fault) | do it
#else
jra _C_LABEL(illinst)
@@ -284,17 +284,17 @@
#ifdef FPSP
jmp _ASM_LABEL(fpsp_unsupp) | yes, go handle it
#else
- clrl sp@- | stack adjust count
- moveml #0xFFFF,sp@- | save registers
- moveq #T_FPEMULD,d0 | denote as FP emulation trap
+ clrl %sp@- | stack adjust count
+ moveml #0xFFFF,%sp@- | save registers
+ moveq #T_FPEMULD,%d0 | denote as FP emulation trap
jra _ASM_LABEL(fault) | do it
#endif
Lfp_unsupp:
#endif
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