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[src/trunk]: src/sys/arch Part 2 of merge.... the dissapearance of mainbus fr...
details: https://anonhg.NetBSD.org/src/rev/49207819f78e
branches: trunk
changeset: 504188:49207819f78e
user: reinoud <reinoud%NetBSD.org@localhost>
date: Sat Feb 24 19:38:01 2001 +0000
description:
Part 2 of merge.... the dissapearance of mainbus from arm32 and hpcarm;
these parts were a 100% the same and i've included the extensions made by
hpcarm in the tree.
Checked for occurence of MD parts; none found.
diffstat:
sys/arch/arm/mainbus/cpu.c | 564 +++++++++++++++++++++++++++++++
sys/arch/arm/mainbus/mainbus.c | 174 +++++++++
sys/arch/arm/mainbus/mainbus.h | 59 +++
sys/arch/arm/mainbus/mainbus_io.c | 232 ++++++++++++
sys/arch/arm/mainbus/mainbus_io_asm.S | 112 ++++++
sys/arch/arm32/conf/files.arm32 | 10 +-
sys/arch/arm32/mainbus/cpu.c | 551 ------------------------------
sys/arch/arm32/mainbus/mainbus.c | 174 ---------
sys/arch/arm32/mainbus/mainbus.h | 59 ---
sys/arch/arm32/mainbus/mainbus_io.c | 200 ----------
sys/arch/arm32/mainbus/mainbus_io_asm.S | 112 ------
sys/arch/hpcarm/conf/files.hpcarm | 10 +-
sys/arch/hpcarm/mainbus/cpu.c | 519 ----------------------------
sys/arch/hpcarm/mainbus/mainbus.c | 174 ---------
sys/arch/hpcarm/mainbus/mainbus.h | 59 ---
sys/arch/hpcarm/mainbus/mainbus_io.c | 232 ------------
sys/arch/hpcarm/mainbus/mainbus_io_asm.S | 112 ------
17 files changed, 1151 insertions(+), 2202 deletions(-)
diffs (truncated from 3447 to 300 lines):
diff -r ecab58073459 -r 49207819f78e sys/arch/arm/mainbus/cpu.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/mainbus/cpu.c Sat Feb 24 19:38:01 2001 +0000
@@ -0,0 +1,564 @@
+/* $NetBSD: cpu.c,v 1.1 2001/02/24 19:38:01 reinoud Exp $ */
+
+/*
+ * Copyright (c) 1995 Mark Brinicombe.
+ * Copyright (c) 1995 Brini.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Brini.
+ * 4. The name of the company nor the name of the author may be used to
+ * endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * RiscBSD kernel project
+ *
+ * cpu.c
+ *
+ * Probing and configuration for the master cpu
+ *
+ * Created : 10/10/95
+ */
+
+#include "opt_armfpe.h"
+#include "opt_cputypes.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/malloc.h>
+#include <sys/device.h>
+#include <sys/proc.h>
+#include <uvm/uvm_extern.h>
+#include <machine/bootconfig.h>
+#include <machine/io.h>
+#include <machine/conf.h>
+#include <machine/cpu.h>
+#include <machine/cpus.h>
+#include <machine/undefined.h>
+
+#ifdef ARMFPE
+#include <arm32/fpe-arm/armfpe.h>
+#endif /* ARMFPE */
+
+#include "cpu.h"
+#if NCPU != 1
+#error Need 1 CPU configured
+#endif
+
+struct cpu_softc {
+ struct device sc_device;
+ int sc_open;
+};
+
+/* Array of cpu structures, one per possible cpu */
+cpu_t cpus[MAX_CPUS];
+
+char cpu_model[64];
+volatile int undefined_test; /* Used for FPA test */
+extern int cpuctrl; /* cpu control register value */
+
+/* Prototypes */
+void identify_master_cpu __P((int cpu_number, char *dev_name));
+void identify_arm_cpu __P((int cpu_number));
+void identify_arm_fpu __P((int cpu_number));
+
+extern int initialise_fpe __P((cpu_t *cpu));
+
+
+/*
+ * int cpumatch(struct device *parent, struct cfdata *cf, void *aux)
+ *
+ * Probe for the main cpu. Currently all this does is return 1 to
+ * indicate that the cpu was found.
+ */
+
+int
+cpumatch(parent, cf, aux)
+ struct device *parent;
+ struct cfdata *cf;
+ void *aux;
+{
+ return(1);
+}
+
+
+/*
+ * void cpusattach(struct device *parent, struct device *dev, void *aux)
+ *
+ * Attach the main cpu
+ */
+
+void
+cpuattach(parent, self, aux)
+ struct device *parent;
+ struct device *self;
+ void *aux;
+{
+ int loop;
+
+ for (loop = 0; loop < MAX_CPUS; ++loop)
+ memset(&cpus[loop], 0, sizeof(cpu_t));
+
+ identify_master_cpu(CPU_MASTER, self->dv_xname);
+}
+
+struct cfattach cpu_ca = {
+ sizeof(struct cpu_softc), cpumatch, cpuattach
+};
+
+extern struct cfdriver cpu_cd;
+
+/*
+ * Used to test for an FPA. The following function is installed as a coproc1
+ * handler on the undefined instruction vector and then we issue a FPA
+ * instruction. If undefined_test is non zero then the FPA did not handle
+ * the instruction so must be absent.
+ */
+
+int
+fpa_test(address, instruction, frame)
+ u_int address;
+ u_int instruction;
+ trapframe_t *frame;
+{
+ ++undefined_test;
+ return(0);
+}
+
+/*
+ * If an FPA was found then this function is installed as the coproc1 handler
+ * on the undefined instruction vector. Currently we don't support FPA's
+ * so this just triggers an exception.
+ */
+
+int
+fpa_handler(address, instruction, frame, fault_code)
+ u_int address;
+ u_int instruction;
+ trapframe_t *frame;
+ int fault_code;
+{
+ u_int fpsr;
+
+ __asm __volatile("stmfd sp!, {r0}; .word 0xee300110; mov %0, r0; ldmfd sp!, {r0}" : "=r" (fpsr));
+
+ printf("FPA exception: fpsr = %08x\n", fpsr);
+
+ return(1);
+}
+
+
+/*
+ * Identify the master (boot) CPU
+ * This also probes for an FPU and will install an FPE if necessary
+ */
+
+void
+identify_master_cpu(cpu_number, dev_name)
+ int cpu_number;
+ char *dev_name;
+{
+ u_int fpsr;
+
+ cpus[cpu_number].cpu_class = CPU_CLASS_ARM;
+ cpus[cpu_number].cpu_host = CPU_HOST_MAINBUS;
+ cpus[cpu_number].cpu_flags = CPU_FLAG_PRESENT;
+ cpus[cpu_number].cpu_ctrl = cpuctrl;
+
+ /* Get the cpu ID from coprocessor 15 */
+
+ cpus[cpu_number].cpu_id = cpu_id();
+
+ identify_arm_cpu(cpu_number);
+ strcpy(cpu_model, cpus[cpu_number].cpu_model);
+
+ if (cpus[CPU_MASTER].cpu_class == CPU_CLASS_SARM
+ && (cpus[CPU_MASTER].cpu_id & CPU_ID_REVISION_MASK) < 3) {
+ printf("%s: SA-110 with bugged STM^ instruction\n", dev_name);
+ }
+
+#ifdef CPU_ARM8
+ if (cpus[CPU_MASTER].cpu_class == CPU_CLASS_ARM
+ && (cpus[CPU_MASTER].cpu_id & CPU_ID_CPU_MASK) == ID_ARM810) {
+ int clock = arm8_clock_config(0, 0);
+ char *fclk;
+ printf("%s: ARM810 cp15=%02x", dev_name, clock);
+ printf(" clock:%s", (clock & 1) ? " dynamic" : "");
+ printf("%s", (clock & 2) ? " sync" : "");
+ switch ((clock >> 2) & 3) {
+ case 0 :
+ fclk = "bus clock";
+ break;
+ case 1 :
+ fclk = "ref clock";
+ break;
+ case 3 :
+ fclk = "pll";
+ break;
+ default :
+ fclk = "illegal";
+ break;
+ }
+ printf(" fclk source=%s\n", fclk);
+ }
+#endif
+
+ /*
+ * Ok now we test for an FPA
+ * At this point no floating point emulator has been installed.
+ * This means any FP instruction will cause undefined exception.
+ * We install a temporay coproc 1 handler which will modify
+ * undefined_test if it is called.
+ * We then try to read the FP status register. If undefined_test
+ * has been decremented then the instruction was not handled by
+ * an FPA so we know the FPA is missing. If undefined_test is
+ * still 1 then we know the instruction was handled by an FPA.
+ * We then remove our test handler and look at the
+ * FP status register for identification.
+ */
+
+ install_coproc_handler(FP_COPROC, fpa_test);
+
+ undefined_test = 0;
+
+ __asm __volatile("stmfd sp!, {r0}; .word 0xee300110; mov %0, r0; ldmfd sp!, {r0}" : "=r" (fpsr));
+
+ if (undefined_test == 0) {
+ cpus[cpu_number].fpu_type = (fpsr >> 24);
+ switch (fpsr >> 24) {
+ case 0x81 :
+ cpus[cpu_number].fpu_class = FPU_CLASS_FPA;
+ break;
+
+ default :
+ cpus[cpu_number].fpu_class = FPU_CLASS_FPU;
+ break;
+ }
+ cpus[cpu_number].fpu_flags = 0;
+ install_coproc_handler(FP_COPROC, fpa_handler);
+ } else {
+ cpus[cpu_number].fpu_class = FPU_CLASS_NONE;
+ cpus[cpu_number].fpu_flags = 0;
+
+ /*
+ * Ok if ARMFPE is defined and the boot options request the ARM FPE
+ * then it will be installed as the FPE. If the installation fails
+ * the existing FPE is used as a fall back.
+ * If either ARMFPE is not defined or the boot args did not request
+ * it the old FPE is installed.
+ * This is just while I work on integrating the new FPE.
+ * It means the new FPE gets installed if compiled int (ARMFPE
+ * defined) and also gives me a on/off option when I boot in case
+ * the new FPE is causing panics.
+ * In all cases it falls back on the existing FPE is the ARMFPE
+ * was not successfully installed.
+ */
+
+#ifdef ARMFPE
+ if (boot_args) {
+ char *ptr;
+
+ ptr = strstr(boot_args, "noarmfpe");
+ if (!ptr) {
+ if (initialise_arm_fpe(&cpus[cpu_number]) != 0) {
+ identify_arm_fpu(cpu_number);
+#ifdef FPE
+ initialise_fpe(&cpus[cpu_number]);
+#endif
+ }
+#ifdef FPE
+ } else
+ initialise_fpe(&cpus[cpu_number]);
+
+ } else
+ initialise_fpe(&cpus[cpu_number]);
+#else
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