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[src/trunk]: src/sys/arch/sparc/sparc Switch to MI mk48xx and intersil7170 ti...



details:   https://anonhg.NetBSD.org/src/rev/7ec552ca53ab
branches:  trunk
changeset: 499108:7ec552ca53ab
user:      pk <pk%NetBSD.org@localhost>
date:      Sat Nov 11 12:14:03 2000 +0000

description:
Switch to MI mk48xx and intersil7170 time-of-day clock drivers.

diffstat:

 sys/arch/sparc/sparc/clock.c |  662 +++++++++++-------------------------------
 1 files changed, 179 insertions(+), 483 deletions(-)

diffs (truncated from 955 to 300 lines):

diff -r c565a8e6b4de -r 7ec552ca53ab sys/arch/sparc/sparc/clock.c
--- a/sys/arch/sparc/sparc/clock.c      Sat Nov 11 12:12:46 2000 +0000
+++ b/sys/arch/sparc/sparc/clock.c      Sat Nov 11 12:14:03 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: clock.c,v 1.73 2000/07/26 11:28:36 pk Exp $ */
+/*     $NetBSD: clock.c,v 1.74 2000/11/11 12:14:03 pk Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -76,12 +76,14 @@
 #include <machine/autoconf.h>
 #include <machine/eeprom.h>
 #include <machine/cpu.h>
+#include <machine/idprom.h>
 
 #include <dev/clock_subr.h>
+#include <dev/ic/mk48txxreg.h>
+#include <dev/ic/intersil7170.h>
 
 #include <sparc/sparc/vaddrs.h>
 #include <sparc/sparc/cpuvar.h>
-#include <sparc/sparc/clockreg.h>
 #include <sparc/sparc/timerreg.h>
 
 /*
@@ -97,39 +99,36 @@
 int statmin;                   /* statclock interval - 1/2*variance */
 int timerok;
 
-#include <dev/ic/intersil7170.h>
 
-extern struct idprom idprom;
-
-#define intersil_command(run, interrupt) \
-    (run | interrupt | INTERSIL_CMD_FREQ_32K | INTERSIL_CMD_24HR_MODE | \
-     INTERSIL_CMD_NORMAL_MODE)
-
-#define intersil_disable(CLOCK) \
-    CLOCK->clk_cmd_reg = \
-    intersil_command(INTERSIL_CMD_RUN, INTERSIL_CMD_IDISABLE)
-
-#define intersil_enable(CLOCK) \
-    CLOCK->clk_cmd_reg = \
-    intersil_command(INTERSIL_CMD_RUN, INTERSIL_CMD_IENABLE)
-
-#define intersil_clear(CLOCK) CLOCK->clk_intr_reg
+extern struct idprom sun4_idprom_store;
 
 #if defined(SUN4)
 /*
  * OCLOCK support: 4/100's and 4/200's have the old clock.
  */
-static int oldclk = 0;
-struct intersil7170 *i7;
+#define intersil_command(run, interrupt) \
+    (run | interrupt | INTERSIL_CMD_FREQ_32K | INTERSIL_CMD_24HR_MODE | \
+     INTERSIL_CMD_NORMAL_MODE)
+
+#define intersil_disable() \
+       bus_space_write_1(i7_bt, i7_bh, INTERSIL_ICMD, \
+                 intersil_command(INTERSIL_CMD_RUN, INTERSIL_CMD_IDISABLE));
 
-static long oclk_get_secs __P((void));
-static void oclk_get_dt __P((struct intersil_dt *));
-static void dt_to_gmt __P((struct intersil_dt *, long *));
-static void oclk_set_dt __P((struct intersil_dt *));
-static void oclk_set_secs __P((long));
-static void gmt_to_dt __P((long *, struct intersil_dt *));
+#define intersil_enable() \
+       bus_space_write_1(i7_bt, i7_bh, INTERSIL_ICMD, \
+                 intersil_command(INTERSIL_CMD_RUN, INTERSIL_CMD_IENABLE));
+
+#define intersil_clear() bus_space_read_1(i7_bt, i7_bh, INTERSIL_IINTR)
+
+static int oldclk = 0;
+bus_space_tag_t i7_bt;
+bus_space_handle_t i7_bh;
 #endif
 
+/* Location and size of the MK48xx TOD clock, if present */
+static bus_space_handle_t      mk_nvram_base;
+static bus_size_t              mk_nvram_size;
+
 static int oclockmatch __P((struct device *, struct cfdata *, void *));
 static void oclockattach __P((struct device *, struct device *, void *));
 
@@ -179,9 +178,7 @@
 static void    clockattach_obio
                        __P((struct device *, struct device *, void *));
 
-static void    clockattach __P((struct clockreg *, struct idprom *, char *));
-
-static struct clockreg *clock_map __P((bus_space_handle_t, char *));
+static void    clockattach __P((int, bus_space_tag_t, bus_space_handle_t));
 
 struct cfattach clock_mainbus_ca = {
        sizeof(struct device), clockmatch_mainbus, clockattach_mainbus
@@ -214,12 +211,14 @@
        sizeof(struct device), timermatch_obio, timerattach_obio
 };
 
-struct chiptime;
-void clk_wenable __P((int));
+/* Global TOD clock handle & idprom pointer */
+static todr_chip_handle_t todr_handle;
+struct idprom *idprom;
+
+static int clk_wenable __P((todr_chip_handle_t, int));
+static void stopcounter __P((struct counter_4m *));
+static void establish_hostid __P((struct idprom *));
 void myetheraddr __P((u_char *));
-int chiptotime __P((int, int, int, int, int, int));
-void timetochip __P((struct chiptime *));
-void stopcounter __P((struct counter_4m *));
 
 int timerblurb = 10; /* Guess a value; used before clock is attached */
 
@@ -262,13 +261,12 @@
 #if defined(SUN4)
        union obio_attach_args *uoba = aux;
        struct obio4_attach_args *oba = &uoba->uoba_oba4;
+       bus_space_tag_t bt = oba->oba_bustag;
        bus_space_handle_t bh;
-       struct idprom *idp;
-       register int h;
 
        oldclk = 1;  /* we've got an oldie! */
 
-       if (obio_bus_map(oba->oba_bustag,
+       if (obio_bus_map(bt,
                         oba->oba_paddr,
                         0,                     /* offset */
                         sizeof(struct intersil7170),
@@ -278,32 +276,38 @@
                printf("%s: can't map register\n", self->dv_xname);
                return;
        }
-       i7 = (struct intersil7170 *)bh;
-
-       idp = &idprom;
-       h = idp->id_machine << 24;
-       h |= idp->id_hostid[0] << 16;
-       h |= idp->id_hostid[1] << 8;
-       h |= idp->id_hostid[2];
-       hostid = h;
+       i7_bt = bt;
+       i7_bh = bh;
 
        /* 
         * calibrate delay() 
         */
        ienab_bic(IE_L14 | IE_L10);     /* disable all clock intrs */
        for (timerblurb = 1; ; timerblurb++) {
-               volatile register char *ireg = &i7->clk_intr_reg;
-               register int ival;
-               *ireg = INTERSIL_INTER_CSECONDS; /* 1/100 sec */
-               intersil_enable(i7);             /* enable clock */
-               while ((*ireg & INTERSIL_INTER_PENDING) == 0)
+               int ival;
+
+               /* Set to 1/100 second interval */
+               bus_space_write_1(bt, bh, INTERSIL_IINTR,
+                                 INTERSIL_INTER_CSECONDS);
+
+               /* enable clock */
+               intersil_enable();
+
+               while ((intersil_clear() & INTERSIL_INTER_PENDING) == 0)
                        /* sync with interrupt */;
-               while ((*ireg & INTERSIL_INTER_PENDING) == 0)
+               while ((intersil_clear() & INTERSIL_INTER_PENDING) == 0)
                        /* XXX: do it again, seems to need it */;
-               delay(10000);                   /* Probe 1/100 sec delay */
-               ival = *ireg;                   /* clear, save value */
-               intersil_disable(i7);           /* disable clock */
-               if (ival & INTERSIL_INTER_PENDING) {
+
+               /* Probe 1/100 sec delay */
+               delay(10000);
+
+               /* clear, save value */
+               ival = intersil_clear();
+
+               /* disable clock */
+               intersil_disable();
+
+               if ((ival & INTERSIL_INTER_PENDING) != 0) {
                        printf(" delay constant %d%s\n", timerblurb,
                                (timerblurb == 1) ? " [TOO SMALL?]" : "");
                        break;
@@ -318,6 +322,12 @@
        /* link interrupt handlers */
        intr_establish(10, &level10);
        intr_establish(14, &level14);
+
+       /* Our TOD clock year 0 represents 1968 */
+       if ((todr_handle = intersil7170_attach(bt, bh, 1968)) == NULL)
+               panic("Can't attach tod clock");
+
+       establish_hostid(idprom = &sun4_idprom_store);
 #endif /* SUN4 */
 }
 
@@ -432,25 +442,6 @@
                                NULL, NULL));
 }
 
-static struct clockreg *
-clock_map(bh, model)
-       bus_space_handle_t bh;
-       char *model;
-{
-       struct clockreg *cl;
-
-       pmap_changeprot(pmap_kernel(), (vaddr_t)bh, VM_PROT_READ, 1);
-       if (strcmp(model, "mk48t08") == 0) {
-               if (NBPG < 8192)
-                       pmap_changeprot(pmap_kernel(), (vaddr_t)bh + 4096,
-                                       VM_PROT_READ, 1);
-               cl = (struct clockreg *)((int)bh + CLK_MK48T08_OFF);
-       } else
-               cl = (struct clockreg *)bh;
-
-       return (cl);
-}
-
 /* ARGSUSED */
 static void
 clockattach_mainbus(parent, self, aux)
@@ -458,18 +449,9 @@
        void *aux;
 {
        struct mainbus_attach_args *ma = aux;
-       char *model;
-       int sz;
-       struct clockreg *cl;
-       struct idprom *idp;
+       bus_space_tag_t bt = ma->ma_bustag;
        bus_space_handle_t bh;
 
-       model = getpropstring(ma->ma_node, "model");
-       /*
-        * the MK48T08 is 8K; the MK48T02 is 2K
-        */
-       sz = strcmp(model, "mk48t08") == 0 ? 8192 : 2048;
-
        /*
         * We ignore any existing virtual address as we need to map
         * this read-only and make it read-write only temporarily,
@@ -478,10 +460,10 @@
         * of reloading the cpu type, Ethernet address, etc, by hand from
         * the console FORTH interpreter.  I intend not to enjoy it again.
         */
-       if (bus_space_map2(ma->ma_bustag,
+       if (bus_space_map2(bt,
                           ma->ma_iospace,
                           ma->ma_paddr,
-                          sz,
+                          ma->ma_size,
                           BUS_SPACE_MAP_LINEAR,
                           0,
                           &bh) != 0) {
@@ -489,9 +471,7 @@
                return;
        }
 
-       cl = clock_map(bh, model);
-       idp = &cl->cl_idprom;
-       clockattach(cl, idp, model);
+       clockattach(ma->ma_node, bt, bh);
 }
 
 static void
@@ -500,80 +480,99 @@
        void *aux;
 {
        union obio_attach_args *uoba = aux;
-       char *model;
-       int sz;
-       struct clockreg *cl;
-       struct idprom *idp;
+       bus_space_tag_t bt;
        bus_space_handle_t bh;
+       int node;
 
        if (uoba->uoba_isobio4 == 0) {
                /* sun4m clock at obio */
                struct sbus_attach_args *sa = &uoba->uoba_sbus;
 
-               model = getpropstring(sa->sa_node, "model");
-               sz = strcmp(model, "mk48t08") == 0 ? 8192 : 2048;
-               if (sbus_bus_map(sa->sa_bustag,
+               node = sa->sa_node;
+               bt = sa->sa_bustag;
+               if (sbus_bus_map(bt,
                                 sa->sa_slot,
                                 sa->sa_offset,
-                                sz,
+                                sa->sa_size,
                                 BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {



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