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[src/trunk]: src/sys/arch/m68k/060sp Prepare for the m68k ELF transition:



details:   https://anonhg.NetBSD.org/src/rev/a7d96efb2424
branches:  trunk
changeset: 499845:a7d96efb2424
user:      scw <scw%NetBSD.org@localhost>
date:      Thu Nov 30 21:00:51 2000 +0000

description:
Prepare for the m68k ELF transition:
 o Add register prefixes for the benefit of gas.new
 o Wrap global symbols in the m68k/asm.h macros
 o Fix `#' comments so the source can be run through the C pre-processor

diffstat:

 sys/arch/m68k/060sp/Makefile.inc  |    5 +-
 sys/arch/m68k/060sp/copyright.S   |    6 +-
 sys/arch/m68k/060sp/fnetbsd.S     |  235 +++++++++++++++++++------------------
 sys/arch/m68k/060sp/inetbsd.S     |  165 ++++++++++++++------------
 sys/arch/m68k/060sp/netbsd060sp.S |  209 +++++++++++++++++---------------
 5 files changed, 325 insertions(+), 295 deletions(-)

diffs (truncated from 1076 to 300 lines):

diff -r 0999144974eb -r a7d96efb2424 sys/arch/m68k/060sp/Makefile.inc
--- a/sys/arch/m68k/060sp/Makefile.inc  Thu Nov 30 20:59:36 2000 +0000
+++ b/sys/arch/m68k/060sp/Makefile.inc  Thu Nov 30 21:00:51 2000 +0000
@@ -1,9 +1,10 @@
 #
-# $NetBSD: Makefile.inc,v 1.5 1999/02/22 21:25:05 is Exp $
+# $NetBSD: Makefile.inc,v 1.6 2000/11/30 21:00:51 scw Exp $
 #
 SPDIR          = $S/arch/m68k/060sp
 
-M060SPAS       = $(AS) -m68060 -I${SPDIR} -o ${.TARGET} ${.IMPSRC}
+M060SPAS       = $(CC) ${AFLAGS} -m68060 ${CPPFLAGS} -I${SPDIR} \
+               -c -o ${.TARGET} ${.IMPSRC}
 
 netbsd.o:      ${SPDIR}/netbsd.S .NOTMAIN
 
diff -r 0999144974eb -r a7d96efb2424 sys/arch/m68k/060sp/copyright.S
--- a/sys/arch/m68k/060sp/copyright.S   Thu Nov 30 20:59:36 2000 +0000
+++ b/sys/arch/m68k/060sp/copyright.S   Thu Nov 30 21:00:51 2000 +0000
@@ -1,6 +1,6 @@
-#
-# $NetBSD: copyright.S,v 1.2 1996/05/16 15:37:49 is Exp $
-#
+|#
+|# $NetBSD: copyright.S,v 1.3 2000/11/30 21:00:51 scw Exp $
+|#
 
  .ascii "MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP\n"
  .ascii "M68000 Hi-Performance Microprocessor Division\n"
diff -r 0999144974eb -r a7d96efb2424 sys/arch/m68k/060sp/fnetbsd.S
--- a/sys/arch/m68k/060sp/fnetbsd.S     Thu Nov 30 20:59:36 2000 +0000
+++ b/sys/arch/m68k/060sp/fnetbsd.S     Thu Nov 30 21:00:51 2000 +0000
@@ -1,5 +1,6 @@
+/*
 #
-# $NetBSD: fnetbsd.S,v 1.4 1999/02/22 21:25:05 is Exp $
+# $NetBSD: fnetbsd.S,v 1.5 2000/11/30 21:00:51 scw Exp $
 #
 #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 # MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
@@ -59,7 +60,9 @@
 # _060_real_fpu_disabled()     #
 # _060_real_trap()             #
 #################################
+*/
 
+/*
 #
 # _060_fpsp_done():
 #
@@ -68,10 +71,11 @@
 # routine. The operating system can do system dependent clean-up or
 # simply execute an "rte" as with the sample code below.
 #
-       .global _060_fpsp_done
-_060_fpsp_done:
+*/
+ASENTRY_NOPROFILE(_060_fpsp_done)
        rte
 
+/*
 #
 # _060_real_ovfl():
 #
@@ -83,13 +87,14 @@
 # The sample routine below simply clears the exception status bit and
 # does an "rte".
 #
-       .global _060_real_ovfl
-_060_real_ovfl:
-       fsave   sp@-
-       movew   #0x6000,sp@(0x2)
-       frestore        sp@+
-       jmp     _fpfault
+*/
+ASENTRY_NOPROFILE(_060_real_ovfl)
+       fsave   %sp@-
+       movew   #0x6000,%sp@(0x2)
+       frestore        %sp@+
+       jmp     _C_LABEL(fpfault)
 
+/*
 #
 # _060_real_unfl():
 #
@@ -101,13 +106,14 @@
 # The sample routine below simply clears the exception status bit and
 # does an "rte".
 #
-       .global _060_real_unfl
-_060_real_unfl:
-       fsave   sp@-
-       movew   #0x6000,sp@(0x2)
-       frestore        sp@+
-       jmp     _fpfault
+*/
+ASENTRY_NOPROFILE(_060_real_unfl)
+       fsave   %sp@-
+       movew   #0x6000,%sp@(0x2)
+       frestore        %sp@+
+       jmp     _C_LABEL(fpfault)
 
+/*
 #
 # _060_real_operr():
 #
@@ -120,13 +126,14 @@
 # The sample routine below simply clears the exception status bit and
 # does an "rte".
 #
-       .global _060_real_operr
-_060_real_operr:
-       fsave   sp@-
-       movew   #0x6000,sp@(0x2)
-       frestore        sp@+
-       jmp     _fpfault
+*/
+ASENTRY_NOPROFILE(_060_real_operr)
+       fsave   %sp@-
+       movew   #0x6000,%sp@(0x2)
+       frestore        %sp@+
+       jmp     _C_LABEL(fpfault)
 
+/*
 #
 # _060_real_snan():
 #
@@ -139,13 +146,14 @@
 # The sample routine below simply clears the exception status bit and
 # does an "rte".
 #
-       .global _060_real_snan
-_060_real_snan:
-       fsave   sp@-
-       movew   #0x6000,sp@(0x2)
-       frestore        sp@+
-       jmp     _fpfault
+*/
+ASENTRY_NOPROFILE(_060_real_snan)
+       fsave   %sp@-
+       movew   #0x6000,%sp@(0x2)
+       frestore        %sp@+
+       jmp     _C_LABEL(fpfault)
 
+/*
 #
 # _060_real_dz():
 #
@@ -158,13 +166,14 @@
 # The sample routine below simply clears the exception status bit and
 # does an "rte".
 #
-       .global _060_real_dz
-_060_real_dz:
-       fsave   sp@-
-       movew   #0x6000,sp@(0x2)
-       frestore        sp@+
-       jmp     _fpfault
+*/
+ASENTRY_NOPROFILE(_060_real_dz)
+       fsave   %sp@-
+       movew   #0x6000,%sp@(0x2)
+       frestore        %sp@+
+       jmp     _C_LABEL(fpfault)
 
+/*
 #
 # _060_real_inex():
 #
@@ -177,13 +186,14 @@
 # The sample routine below simply clears the exception status bit and
 # does an "rte".
 #
-       .global _060_real_inex
-_060_real_inex:
-       fsave   sp@-
-       movew   #0x6000,sp@(0x2)
-       frestore        sp@+
-       jmp     _fpfault
+*/
+ASENTRY_NOPROFILE(_060_real_inex)
+       fsave   %sp@-
+       movew   #0x6000,%sp@(0x2)
+       frestore        %sp@+
+       jmp     _C_LABEL(fpfault)
 
+/*
 #
 # _060_real_bsun():
 #
@@ -196,17 +206,18 @@
 # bit in the FPSR, and does an "rte". The instruction that caused the 
 # bsun will now be re-executed but with the NaN FPSR bit cleared.
 #
-       .global _060_real_bsun
-_060_real_bsun:
-       fsave   sp@-
+*/
+ASENTRY_NOPROFILE(_060_real_bsun)
+       fsave   %sp@-
 
-       fmovel  fpsr,sp@-
-       andib   #0xfe,sp@
-       fmovel  sp@+,fpsr
+       fmovel  %fpsr,%sp@-
+       andib   #0xfe,%sp@
+       fmovel  %sp@+,%fpsr
 
-       addl    #0xc,sp
-       jmp     _fpfault
+       addl    #0xc,%sp
+       jmp     _C_LABEL(fpfault)
 
+/*
 #
 # _060_real_fline():
 #
@@ -217,10 +228,11 @@
 # _fpsp_fline() distinguishes between the three and acts appropriately. F-Line
 # Illegals branch here.
 # 
-       .global _060_real_fline
-_060_real_fline:
-       jmp     _fpfault
+*/
+ASENTRY_NOPROFILE(_060_real_fline)
+       jmp     _C_LABEL(fpfault)
 
+/*
 #
 # _060_real_fpu_disabled():
 #
@@ -236,18 +248,19 @@
 # The execution of the instruction then proceeds with an enabled floating-point
 # unit.
 #
-       .global _060_real_fpu_disabled
-_060_real_fpu_disabled:
-       movel   d0,sp@-                 |# enabled the fpu
+*/
+ASENTRY_NOPROFILE(_060_real_fpu_disabled)
+       movel   %d0,%sp@-               |# enabled the fpu
 
        .short  0x4e7a,0x0808           |* movec.l pcr,d0
-       bclr    #0x1,d0
+       bclr    #0x1,%d0
        .short  0x4e7b,0x0808           |* movec.l d0,pcr
-       movel   sp@+,d0
+       movel   %sp@+,%d0
 
-       movel   sp@(0xc),sp@(0x2)       |# set "Current PC"
+       movel   %sp@(0xc),%sp@(0x2)     |# set "Current PC"
        rte
 
+/*
 #
 # _060_real_trap():
 #
@@ -257,52 +270,45 @@
 #
 # The sample code below simply executes an "rte".
 #
-       .global _060_real_trap
-_060_real_trap:
+*/
+ASENTRY_NOPROFILE(_060_real_trap)
        rte
 
+/*
 #############################################################################
 
 ##################################
 # (2) EXAMPLE PACKAGE ENTRY CODE #
 ##################################
-
-       .global _060_fpsp_snan
-_060_fpsp_snan:
-       bral    _FP_CALL_TOP+0x80+0x00
+*/
+ASENTRY_NOPROFILE(_060_fpsp_snan)
+       bral    _C_LABEL(FP_CALL_TOP)+0x80+0x00
 
-       .global _060_fpsp_operr
-_060_fpsp_operr:
-       bral    _FP_CALL_TOP+0x80+0x08
+ASENTRY_NOPROFILE(_060_fpsp_operr)
+       bral    _C_LABEL(FP_CALL_TOP)+0x80+0x08
 
-       .global _060_fpsp_ovfl
-_060_fpsp_ovfl:
-       bral    _FP_CALL_TOP+0x80+0x10
+ASENTRY_NOPROFILE(_060_fpsp_ovfl)
+       bral    _C_LABEL(FP_CALL_TOP)+0x80+0x10
 
-       .global _060_fpsp_unfl
-_060_fpsp_unfl:
-       bral    _FP_CALL_TOP+0x80+0x18
+ASENTRY_NOPROFILE(_060_fpsp_unfl)
+       bral    _C_LABEL(FP_CALL_TOP)+0x80+0x18
 



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