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[src/trunk]: src/sys/arch - Move more contents of various <machine/vmparam.h>...
details: https://anonhg.NetBSD.org/src/rev/1d63dad69628
branches: trunk
changeset: 518032:1d63dad69628
user: thorpej <thorpej%NetBSD.org@localhost>
date: Fri Nov 23 17:39:03 2001 +0000
description:
- Move more contents of various <machine/vmparam.h> files into
<arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap
implementation).
- Since the MMU definitions in pte.h are specific to ARM processors
that support 32-bit mode, move pte.h to <arm/arm32/pte.h>.
- Make the Netwinder startup file build again (use PT_B|PT_C, rather
than PT_CACHEABLE, since the latter expands to a variable these days).
diffstat:
sys/arch/acorn32/include/vmparam.h | 20 +----
sys/arch/arm/include/Makefile | 8 +-
sys/arch/arm/include/arm32/Makefile | 4 +-
sys/arch/arm/include/arm32/pmap.h | 8 +-
sys/arch/arm/include/arm32/pte.h | 130 +++++++++++++++++++++++++++++++++++
sys/arch/arm/include/arm32/vmparam.h | 21 +++++-
sys/arch/arm/include/pcb.h | 5 +-
sys/arch/arm/include/pte.h | 130 -----------------------------------
sys/arch/arm32/include/vmparam.h | 19 +----
sys/arch/cats/include/vmparam.h | 19 +----
sys/arch/dnard/include/vmparam.h | 19 +----
sys/arch/evbarm/include/vmparam.h | 19 +----
sys/arch/evbarm/integrator/intmmu.S | 5 +-
sys/arch/hpcarm/include/vmparam.h | 19 +----
sys/arch/netwinder/include/vmparam.h | 19 +----
sys/arch/netwinder/netwinder/nwmmu.S | 11 +-
16 files changed, 195 insertions(+), 261 deletions(-)
diffs (truncated from 744 to 300 lines):
diff -r 803c8c1ba08d -r 1d63dad69628 sys/arch/acorn32/include/vmparam.h
--- a/sys/arch/acorn32/include/vmparam.h Fri Nov 23 17:29:00 2001 +0000
+++ b/sys/arch/acorn32/include/vmparam.h Fri Nov 23 17:39:03 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vmparam.h,v 1.3 2001/11/15 18:06:11 soren Exp $ */
+/* $NetBSD: vmparam.h,v 1.4 2001/11/23 17:39:03 thorpej Exp $ */
/*
* Copyright (c) 1988 The Regents of the University of California.
@@ -36,8 +36,7 @@
#ifndef _ARM32_VMPARAM_H_
#define _ARM32_VMPARAM_H_
-/* for pt_entry_t definition */
-#include <machine/pte.h>
+#ifdef _KERNEL
#include <arm/arm32/vmparam.h>
@@ -174,19 +173,6 @@
#define VM_FREELIST_ISADMA 1
#define VM_FREELIST_RPCDMA 1
-/*
- * define structure pmap_physseg: there is one of these structures
- * for each chunk of noncontig RAM you have.
- */
-
-#define __HAVE_PMAP_PHYSSEG
-
-struct pmap_physseg {
- struct pv_head *pvhead; /* pv_entry array */
- char *attrs; /* attrs array */
-};
+#endif /* _KERNEL */
#endif /* _ARM32_VMPARAM_H_ */
-
-/* End of vmparam.h */
-
diff -r 803c8c1ba08d -r 1d63dad69628 sys/arch/arm/include/Makefile
--- a/sys/arch/arm/include/Makefile Fri Nov 23 17:29:00 2001 +0000
+++ b/sys/arch/arm/include/Makefile Fri Nov 23 17:39:03 2001 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.21 2001/09/03 19:20:27 matt Exp $
+# $NetBSD: Makefile,v 1.22 2001/11/23 17:39:03 thorpej Exp $
KDIR= /sys/arch/arm/include
INCSDIR= /usr/include/arm
@@ -15,11 +15,11 @@
limits.h lock.h \
math.h \
ofisa_machdep.h ofw.h \
- param.h pcb.h pci_machdep.h pio.h pmap.h proc.h profile.h profileio.h \
- pte.h ptrace.h \
+ param.h pcb.h pci_machdep.h pio.h proc.h profile.h profileio.h \
+ ptrace.h \
reg.h \
setjmp.h signal.h stdarg.h sysarch.h \
trap.h types.h \
- varargs.h vmparam.h
+ varargs.h
.include <bsd.kinc.mk>
diff -r 803c8c1ba08d -r 1d63dad69628 sys/arch/arm/include/arm32/Makefile
--- a/sys/arch/arm/include/arm32/Makefile Fri Nov 23 17:29:00 2001 +0000
+++ b/sys/arch/arm/include/arm32/Makefile Fri Nov 23 17:39:03 2001 +0000
@@ -1,8 +1,8 @@
-# $NetBSD: Makefile,v 1.7 2001/11/22 17:59:58 thorpej Exp $
+# $NetBSD: Makefile,v 1.8 2001/11/23 17:39:04 thorpej Exp $
KDIR= /sys/arch/arm/include/arm32
INCSDIR= /usr/include/arm/arm32
-INCS= frame.h katelib.h param.h pmap.h psl.h rtc.h types.h vmparam.h
+INCS= frame.h katelib.h param.h pmap.h psl.h pte.h rtc.h types.h vmparam.h
.include <bsd.kinc.mk>
diff -r 803c8c1ba08d -r 1d63dad69628 sys/arch/arm/include/arm32/pmap.h
--- a/sys/arch/arm/include/arm32/pmap.h Fri Nov 23 17:29:00 2001 +0000
+++ b/sys/arch/arm/include/arm32/pmap.h Fri Nov 23 17:39:03 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.17 2001/11/19 18:41:33 thorpej Exp $ */
+/* $NetBSD: pmap.h,v 1.18 2001/11/23 17:39:04 thorpej Exp $ */
/*
* Copyright (c) 1994,1995 Mark Brinicombe.
@@ -33,8 +33,10 @@
#ifndef _ARM32_PMAP_H_
#define _ARM32_PMAP_H_
+#ifdef _KERNEL
+
#include <machine/cpufunc.h>
-#include <machine/pte.h>
+#include <arm/arm32/pte.h>
#include <uvm/uvm_object.h>
/*
@@ -209,4 +211,6 @@
#define KERNEL_PD_SIZE \
(PD_SIZE - (KERNEL_SPACE_START >> PDSHIFT) * sizeof(pd_entry_t))
+#endif /* _KERNEL */
+
#endif /* _ARM32_PMAP_H_ */
diff -r 803c8c1ba08d -r 1d63dad69628 sys/arch/arm/include/arm32/pte.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/include/arm32/pte.h Fri Nov 23 17:39:03 2001 +0000
@@ -0,0 +1,130 @@
+/* $NetBSD: pte.h,v 1.1 2001/11/23 17:39:04 thorpej Exp $ */
+
+/*
+ * Copyright (c) 1994 Mark Brinicombe.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the RiscBSD team.
+ * 4. The name "RiscBSD" nor the name of the author may be used to
+ * endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY RISCBSD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL RISCBSD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _ARM32_PTE_H_
+#define _ARM32_PTE_H_
+
+#define PDSHIFT 20 /* LOG2(NBPDR) */
+#define NBPD (1 << PDSHIFT) /* bytes/page dir */
+#define NPTEPD (NBPD / NBPG)
+
+#ifndef _LOCORE
+typedef int pd_entry_t; /* page directory entry */
+typedef int pt_entry_t; /* page table entry */
+#endif
+
+#define PD_MASK 0xfff00000 /* page directory address bits */
+#define PT_MASK 0x000ff000 /* page table address bits */
+
+#define PG_FRAME 0xfffff000
+
+/* The PT_SIZE definition is misleading... A page table is only 0x400
+ * bytes long. But since VM mapping can only be done to 0x1000 a single
+ * 1KB blocks cannot be steered to a va by itself. Therefore the
+ * pages tables are allocated in blocks of 4. i.e. if a 1 KB block
+ * was allocated for a PT then the other 3KB would also get mapped
+ * whenever the 1KB was mapped.
+ */
+
+#define PT_SIZE 0x1000
+#define PD_SIZE 0x4000
+
+/* Access permissions for L1 sections and L2 pages */
+#define AP_KR 0x00
+#define AP_KRW 0x01
+#define AP_KRWUR 0x02
+#define AP_KRWURW 0x03
+
+#define AP_W 0x01
+#define AP_U 0x02
+
+/* Physical bits in a pte */
+#define PT_B 0x04 /* Phys - Buffered (write) */
+#define PT_C 0x08 /* Phys - Cacheable */
+#define PT_U 0x10 /* Phys - Updateable */
+
+#ifndef _LOCORE
+extern pt_entry_t pte_cache_mode;
+
+#define PT_CACHEABLE (pte_cache_mode)
+#endif
+
+/* Page R/M attributes (in pmseg.attrs). */
+#define PT_M 0x01 /* Virt - Modified */
+#define PT_H 0x02 /* Virt - Handled (Used) */
+/* Mapping wired/writeable/cacheable attributes (in pv_flags). */
+#define PT_W 0x04 /* Virt - Wired */
+#define PT_Wr 0x08 /* Virt / Phys Write */
+#define PT_NC 0x10 /* Cacheing disabled (multi-mapped page) */
+
+/* access permissions for L2 pages (all sub pages have the same perms) */
+#define PT_AP(x) ((x << 10) | (x << 8) | (x << 6) | (x << 4))
+
+/* shift for access permissions in a L1 section mapping */
+#define AP_SECTION_SHIFT 10
+
+/* Page table types and masks */
+#define L1_PAGE 0x01 /* L1 page table mapping */
+#define L1_SECTION 0x02 /* L1 section mapping */
+#define L1_FPAGE 0x03 /* L1 fine page mapping */
+#define L1_MASK 0x03 /* Mask for L1 entry type */
+#define L2_LPAGE 0x01 /* L2 large page (64KB) */
+#define L2_SPAGE 0x02 /* L2 small page (4KB) */
+#define L2_MASK 0x03 /* Mask for L2 entry type */
+#define L2_INVAL 0x00 /* L2 invalid type */
+
+/* PTE construction macros */
+#define L2_LPTE(p, a, f) ((p) | PT_AP(a) | L2_LPAGE | (f))
+#define L2_SPTE(p, a, f) ((p) | PT_AP(a) | L2_SPAGE | (f))
+#define L2_PTE(p, a) L2_SPTE((p), (a), PT_CACHEABLE)
+#define L2_PTE_NC(p, a) L2_SPTE((p), (a), PT_B)
+#define L2_PTE_NC_NB(p, a) L2_SPTE((p), (a), 0)
+#define L1_SECPTE(p, a, f) ((p) | ((a) << AP_SECTION_SHIFT) | (f) \
+ | L1_SECTION | PT_U)
+
+#define L1_PTE(p) ((p) | 0x00 | L1_PAGE | PT_U)
+#define L1_SEC(p, c) L1_SECPTE((p), AP_KRW, (c))
+
+#define L1_SEC_SIZE (1 << PDSHIFT)
+#define L2_LPAGE_SIZE (NBPG * 16)
+
+/* Domain types */
+#define DOMAIN_FAULT 0x00
+#define DOMAIN_CLIENT 0x01
+#define DOMAIN_RESERVED 0x02
+#define DOMAIN_MANAGER 0x03
+
+#endif
+
+/* End of pte.h */
diff -r 803c8c1ba08d -r 1d63dad69628 sys/arch/arm/include/arm32/vmparam.h
--- a/sys/arch/arm/include/arm32/vmparam.h Fri Nov 23 17:29:00 2001 +0000
+++ b/sys/arch/arm/include/arm32/vmparam.h Fri Nov 23 17:39:03 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vmparam.h,v 1.1 2001/11/11 16:40:36 thorpej Exp $ */
+/* $NetBSD: vmparam.h,v 1.2 2001/11/23 17:39:04 thorpej Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -38,10 +38,15 @@
#ifndef _ARM_ARM32_VMPARAM_H_
#define _ARM_ARM32_VMPARAM_H_
+#ifdef _KERNEL
+
/*
* Virtual Memory parameters common to all arm32 platforms.
*/
+/* for pt_entry_t definition */
+#include <arm/arm32/pte.h>
+
/*
* While the ARM architecture defines Section mappings, large pages,
* and small pages, the standard page size is (and will always be) 4K.
@@ -50,4 +55,18 @@
#define PAGE_SIZE (1 << PAGE_SHIFT)
#define PAGE_MASK (PAGE_SIZE - 1)
+/*
+ * define structure pmap_physseg: there is one of these structures
+ * for each chunk of noncontig RAM you have.
+ */
+
+#define __HAVE_PMAP_PHYSSEG
+
+struct pmap_physseg {
+ struct pv_head *pvhead; /* pv_entry array */
+ char *attrs; /* attrs array */
+};
+
+#endif /* _KERNEL */
+
#endif /* _ARM_ARM32_VMPARAM_H_ */
diff -r 803c8c1ba08d -r 1d63dad69628 sys/arch/arm/include/pcb.h
--- a/sys/arch/arm/include/pcb.h Fri Nov 23 17:29:00 2001 +0000
+++ b/sys/arch/arm/include/pcb.h Fri Nov 23 17:39:03 2001 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pcb.h,v 1.2 2001/09/09 10:33:43 toshii Exp $ */
+/* $NetBSD: pcb.h,v 1.3 2001/11/23 17:39:04 thorpej Exp $ */
/*
* Copyright (c) 2001 Matt Thomas <matt%3am-software.com@localhost>.
@@ -37,9 +37,10 @@
#define _ARM_PCB_H_
#include <machine/frame.h>
-#include <machine/pte.h>
#include <machine/fp.h>
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