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[src/trunk]: src/sys/arch/arm26 Add a skeleton driver for the random latches ...
details: https://anonhg.NetBSD.org/src/rev/97d50d942ac7
branches: trunk
changeset: 508906:97d50d942ac7
user: bjh21 <bjh21%NetBSD.org@localhost>
date: Sun Apr 22 00:26:35 2001 +0000
description:
Add a skeleton driver for the random latches on the Archimedes, which are
shared between the printer port and floppy drive. Useful facilities will be
added when I know what I need.
diffstat:
sys/arch/arm26/conf/FOURMEG | 3 +-
sys/arch/arm26/conf/GENERIC | 3 +-
sys/arch/arm26/conf/files.arm26 | 9 ++-
sys/arch/arm26/ioc/latches.c | 99 +++++++++++++++++++++++++++++++++++++++++
sys/arch/arm26/ioc/latchreg.h | 47 +++++++++---------
sys/arch/arm26/ioc/latchvar.h | 33 +++++++++++++
6 files changed, 165 insertions(+), 29 deletions(-)
diffs (263 lines):
diff -r 9f94acb77240 -r 97d50d942ac7 sys/arch/arm26/conf/FOURMEG
--- a/sys/arch/arm26/conf/FOURMEG Sat Apr 21 23:51:14 2001 +0000
+++ b/sys/arch/arm26/conf/FOURMEG Sun Apr 22 00:26:35 2001 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: FOURMEG,v 1.13 2001/04/10 21:33:00 bjh21 Exp $
+# $NetBSD: FOURMEG,v 1.14 2001/04/22 00:26:35 bjh21 Exp $
# FOURMEG arm26 configuration -- something small
@@ -130,6 +130,7 @@
wsmouse0 at arcwsmouse0
ioeb0 at ioc0 bank 5 # I/O Extension Block (A5000)
+latches0 at ioc0 bank 5 # Printer/FDC control latches (Arc)
podulebus0 at ioc0 bank 4 # Expansion card bus
unixbp0 at ioc0 bank 6 # Unix Backplane (interrupt routing)
diff -r 9f94acb77240 -r 97d50d942ac7 sys/arch/arm26/conf/GENERIC
--- a/sys/arch/arm26/conf/GENERIC Sat Apr 21 23:51:14 2001 +0000
+++ b/sys/arch/arm26/conf/GENERIC Sun Apr 22 00:26:35 2001 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: GENERIC,v 1.19 2001/04/10 21:33:00 bjh21 Exp $
+# $NetBSD: GENERIC,v 1.20 2001/04/22 00:26:35 bjh21 Exp $
# GENERIC arm26 configuration -- everything I've implemented so far
@@ -127,6 +127,7 @@
wsmouse0 at arcwsmouse0
ioeb0 at ioc0 bank 5 # I/O Extension Block (A5000)
+latches0 at ioc0 bank 5 # Printer/FDC control latches (Arc)
podulebus0 at ioc0 bank 4 # Expansion card bus
unixbp0 at ioc0 bank 6 # Unix Backplane (interrupt routing)
diff -r 9f94acb77240 -r 97d50d942ac7 sys/arch/arm26/conf/files.arm26
--- a/sys/arch/arm26/conf/files.arm26 Sat Apr 21 23:51:14 2001 +0000
+++ b/sys/arch/arm26/conf/files.arm26 Sun Apr 22 00:26:35 2001 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.arm26,v 1.27 2001/04/10 21:33:01 bjh21 Exp $
+# $NetBSD: files.arm26,v 1.28 2001/04/22 00:26:35 bjh21 Exp $
# Copyright (c) 1997, 1998, 2000 Ben Harris
# All rights reserved.
@@ -84,9 +84,10 @@
device joy
attach joy at ioeb
-# Latches (random internal use) (usually at bank 5 offset 0x18 and 0x40)
-device latch
-attach latch at ioc
+# Latches (random internal use) (usually at ioc0 bank 5)
+device latches
+attach latches at ioc
+file arch/arm26/ioc/latches.c latches
# On-board keyboard interface
device arckbd { }
diff -r 9f94acb77240 -r 97d50d942ac7 sys/arch/arm26/ioc/latches.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm26/ioc/latches.c Sun Apr 22 00:26:35 2001 +0000
@@ -0,0 +1,99 @@
+/* $NetBSD: latches.c,v 1.1 2001/04/22 00:26:36 bjh21 Exp $ */
+
+/*-
+ * Copyright (c) 2001 Ben Harris
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+
+__KERNEL_RCSID(0, "$NetBSD: latches.c,v 1.1 2001/04/22 00:26:36 bjh21 Exp $");
+
+#include <sys/device.h>
+#include <sys/systm.h>
+
+#include <machine/bus.h>
+
+#include <arch/arm26/iobus/iocvar.h>
+#include <arch/arm26/ioc/latchreg.h>
+#include <arch/arm26/ioc/latchvar.h>
+#include <arch/arm26/ioc/ioebvar.h>
+
+#include "ioeb.h"
+
+struct latches_softc {
+ struct device sc_dev;
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
+ u_int8_t sc_latcha;
+ u_int8_t sc_latchb;
+};
+
+static int latches_match(struct device *, struct cfdata *, void *);
+static void latches_attach(struct device *, struct device *, void *);
+
+struct cfattach latches_ca = {
+ sizeof(struct latches_softc), latches_match, latches_attach
+};
+
+struct device *the_latches;
+
+static int
+latches_match(struct device *parent, struct cfdata *cf, void *aux)
+{
+
+ /*
+ * Latches are write-only, so we can't probe for them.
+ * Happily, the set of machines they exist on is precisely the
+ * set that doesn't have IOEBs, so...
+ */
+#if NIOEB > 0
+ if (the_ioeb != NULL)
+ return 0;
+#endif
+ return 1;
+}
+
+static void
+latches_attach(struct device *parent, struct device *self, void *aux)
+{
+ struct latches_softc *sc = (void *)self;
+ struct ioc_attach_args *ioc = aux;
+ bus_space_tag_t iot;
+ bus_space_handle_t ioh;
+
+ if (the_latches == NULL)
+ the_latches = self;
+ iot = sc->sc_iot = ioc->ioc_fast_t;
+ ioh = sc->sc_ioh = ioc->ioc_fast_h;
+
+ sc->sc_latcha =
+ LATCHA_NSEL0 | LATCHA_NSEL1 | LATCHA_NSEL2 | LATCHA_NSEL3 |
+ LATCHA_NSIDE1 | LATCHA_NMOTORON | LATCHA_NINUSE;
+ sc->sc_latchb = LATCHB_NFDCR | LATCHB_NPSTB;
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, LATCH_A, sc->sc_latcha);
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, LATCH_B, sc->sc_latchb);
+ printf("\n");
+}
diff -r 9f94acb77240 -r 97d50d942ac7 sys/arch/arm26/ioc/latchreg.h
--- a/sys/arch/arm26/ioc/latchreg.h Sat Apr 21 23:51:14 2001 +0000
+++ b/sys/arch/arm26/ioc/latchreg.h Sun Apr 22 00:26:35 2001 +0000
@@ -1,6 +1,6 @@
-/* $NetBSD: latchreg.h,v 1.1 2000/05/09 21:56:02 bjh21 Exp $ */
+/* $NetBSD: latchreg.h,v 1.2 2001/04/22 00:26:36 bjh21 Exp $ */
/*-
- * Copyright (c) 1997, 1998 Ben Harris
+ * Copyright (c) 1997, 1998, 2001 Ben Harris
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -30,31 +30,32 @@
* latchreg.h - Archimedes internal latches
*/
-/* Under NetBSD, Latch A is latch0 and Latch B is latch1. */
-
#ifndef _LATCHREG_H
#define _LATCHREG_H
-/* Latch A controls some of the floppy disc system */
+/* Register offsets for latches (bus_space units) */
+
+#define LATCH_A 0x10
+#define LATCH_B 0x06
-#define LATCH0_DRIVESEL0 0x01 /* Floppy drive 0 select */
-#define LATCH0_DRIVESEL1 0x02 /* Floppy drive 1 select */
-#define LATCH0_DRIVESEL2 0x04 /* Floppy drive 2 select */
-#define LATCH0_DRIVESEL3 0x08 /* Floppy drive 3 select */
-#define LATCH0_SIDESEL 0x10 /* Floppy side select, inverted. */
-#define LATCH0_SIDE0 0x10
-#define LATCH0_SIDE1 0x00 /* Just to be friendly... */
-#define LATCH0_MOTORONOFF 0x20 /* Motor on/off */
-#define LATCH0_INUSE 0x40 /* 'In Use' */
+/* Latch A controls some of the floppy disc system (all active-low). */
+#define LATCHA_NSEL0 0x01 /* Floppy drive 0 select */
+#define LATCHA_NSEL1 0x02 /* Floppy drive 1 select */
+#define LATCHA_NSEL2 0x04 /* Floppy drive 2 select */
+#define LATCHA_NSEL3 0x08 /* Floppy drive 3 select */
+#define LATCHA_NSIDE1 0x10 /* Floppy side select. */
+#define LATCHA_NMOTORON 0x20 /* Motor on/off */
+#define LATCHA_NINUSE 0x40 /* 'In Use' */
+/* Bit 7 not used */
-/* Latch B does all sorts of random stuff */
-
-#define LATCH1_DENSITY 0x02 /* Floppy disc density setting */
-#define LATCH1_DOUBLEDENSITY 0x00 /* Double density */
-#define LATCH1_SINGLEDENSITY 0x02 /* Single density */
-#define LATCH1_NOTFDCRESET 0x08 /* Floppy controller reset (inverted) */
-#define LATCH1_LPTSTROBE 0x10 /* Printer strobe line */
-#define LATCH1_AUX1 0x20 /* Spare (VIDC Enhancer?) */
-#define LATCH1_AUX2 0x40 /* Spare */
+/* Latch B does all sorts of random stuff (mostly active-low). */
+/* Bit 0 reserved */
+#define LATCHB_NDDEN 0x02 /* Floppy disc density setting */
+/* Bit 2 reserved */
+#define LATCHB_NFDCR 0x08 /* Floppy controller reset */
+#define LATCHB_NPSTB 0x10 /* Printer strobe line */
+#define LATCHB_AUX1 0x20 /* Spare (VIDC Enhancer?) */
+#define LATCHB_AUX2 0x40 /* Spare */
+/* Bit 7 not used */
#endif /* !_LATCHREG_H */
diff -r 9f94acb77240 -r 97d50d942ac7 sys/arch/arm26/ioc/latchvar.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm26/ioc/latchvar.h Sun Apr 22 00:26:35 2001 +0000
@@ -0,0 +1,33 @@
+/* $NetBSD: latchvar.h,v 1.1 2001/04/22 00:26:36 bjh21 Exp $ */
+
+/*-
+ * Copyright (c) 2001 Ben Harris
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LATCHVAR_H_
+#define _LATCHVAR_H_
+extern struct device *the_latches;
+#endif
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