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[src/trunk]: src/sys/dev/mca Nonworking NCR 53c90 attachment. I don't get any...



details:   https://anonhg.NetBSD.org/src/rev/939c61edf5c8
branches:  trunk
changeset: 518491:939c61edf5c8
user:      jdolecek <jdolecek%NetBSD.org@localhost>
date:      Sat Dec 01 10:42:38 2001 +0000

description:
Nonworking NCR 53c90 attachment. I don't get any interrupts from
the device yet, need to find real NCR53c90 docs to figure out what's wrong.

diffstat:

 sys/dev/mca/esp_mca.c |  439 ++++++++++++++++++++++++++++++++++++++++++++++++++
 sys/dev/mca/espvar.h  |   55 ++++++
 sys/dev/mca/files.mca |    6 +-
 3 files changed, 499 insertions(+), 1 deletions(-)

diffs (truncated from 519 to 300 lines):

diff -r dcdcaae8f516 -r 939c61edf5c8 sys/dev/mca/esp_mca.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/dev/mca/esp_mca.c     Sat Dec 01 10:42:38 2001 +0000
@@ -0,0 +1,439 @@
+/*     $NetBSD: esp_mca.c,v 1.1 2001/12/01 10:42:38 jdolecek Exp $     */
+
+/*-
+ * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Charles M. Hannum, Jason R. Thorpe of the Numerical Aerospace
+ * Simulation Facility, NASA Ames Research Center and Jaromir Dolecek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed by the NetBSD
+ *     Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1994 Peter Galbavy
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed by Peter Galbavy
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Based on aic6360 by Jarle Greipsland
+ *
+ * Acknowledgements: Many of the algorithms used in this driver are
+ * inspired by the work of Julian Elischer (julian%tfs.com@localhost) and
+ * Charles Hannum (mycroft%duality.gnu.ai.mit.edu@localhost).  Thanks a million!
+ */
+
+/*
+ * Grabbed from the sparc port at revision 1.73 for the NeXT.
+ * Darrin B. Jewell <dbj%netbsd.org@localhost>  Sat Jul  4 15:41:32 1998
+ */
+
+/*
+ * XXX This MCA attachment for NCR 53C90 does not work yet.
+ * After attach, the NCR_INTR gets set according to previously
+ * done Bus Reset, but interrupts are generated later on, so this
+ * stalls on boot waiting for the device detection stuff to finish.
+ * It seem like the device needs some special EOI handling, to tell
+ * it that it can send another interrupt. I need real NCR53C90 docs,
+ * which I don't have currently.
+ * jdolecek 20011201
+ */
+#error this driver does not work
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/errno.h>
+#include <sys/ioctl.h>
+#include <sys/device.h>
+#include <sys/buf.h>
+#include <sys/proc.h>
+#include <sys/user.h>
+#include <sys/queue.h>
+
+#include <dev/scsipi/scsi_all.h>
+#include <dev/scsipi/scsipi_all.h>
+#include <dev/scsipi/scsiconf.h>
+#include <dev/scsipi/scsi_message.h>
+
+#include <machine/bus.h>
+#include <machine/cpu.h>
+
+#include <dev/ic/ncr53c9xreg.h>
+#include <dev/ic/ncr53c9xvar.h>
+
+#include <dev/mca/espvar.h>
+
+#include <dev/mca/mcavar.h>
+#include <dev/mca/mcareg.h>
+#include <dev/mca/mcadevs.h>
+
+#if defined(DEBUG) && !defined(NCR53C9X_DEBUG)
+#define NCR53C9X_DEBUG
+#endif
+
+#ifdef NCR53C9X_DEBUG
+static int esp_mca_debug = 1;
+#define DPRINTF(x) if (esp_mca_debug) printf x;
+#else
+#define DPRINTF(x)
+#endif
+
+#define ESP_MCA_IOSIZE  0x20
+
+static void    esp_mca_attach  __P((struct device *, struct device *, void *));
+static int     esp_mca_match   __P((struct device *, struct cfdata *, void *));
+
+/* Linkup to the rest of the kernel */
+struct cfattach esp_mca_ca = {
+       sizeof(struct esp_softc), esp_mca_match, esp_mca_attach
+};
+
+/*
+ * Functions and the switch for the MI code.
+ */
+static u_char  esp_read_reg __P((struct ncr53c9x_softc *, int));
+static void    esp_write_reg __P((struct ncr53c9x_softc *, int, u_char));
+static int     esp_dma_isintr __P((struct ncr53c9x_softc *));
+static void    esp_dma_reset __P((struct ncr53c9x_softc *));
+static int     esp_dma_intr __P((struct ncr53c9x_softc *));
+static int     esp_dma_setup __P((struct ncr53c9x_softc *, caddr_t *,
+           size_t *, int, size_t *));
+static void    esp_dma_go __P((struct ncr53c9x_softc *));
+static void    esp_dma_stop __P((struct ncr53c9x_softc *));
+static int     esp_dma_isactive __P((struct ncr53c9x_softc *));
+
+static struct ncr53c9x_glue esp_glue = {
+       esp_read_reg,
+       esp_write_reg,
+       esp_dma_isintr,
+       esp_dma_reset,
+       esp_dma_intr,
+       esp_dma_setup,
+       esp_dma_go,
+       esp_dma_stop,
+       esp_dma_isactive,
+       NULL,                   /* gl_clear_latched_intr */
+};
+
+static int
+esp_mca_match(parent, cf, aux)
+       struct device *parent;
+       struct cfdata *cf;
+       void *aux;
+{
+       struct mca_attach_args *ma = aux;
+
+       switch (ma->ma_id) {
+       case MCA_PRODUCT_NCR53C90:
+               return 1;
+       }
+
+       return 0;
+}
+
+static void
+esp_mca_attach(parent, self, aux)
+       struct device *parent, *self;
+       void *aux;
+{
+       struct mca_attach_args *ma = aux;
+       struct esp_softc *esc = (void *)self;
+       struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
+       int iobase, scsi_id, irq, drq, error;
+       bus_space_handle_t ioh;
+       int pos2, pos3, pos5;
+
+       static const int ncrmca_iobase[] = {
+               0, 0x240, 0x340, 0x400, 0x420, 0x3240, 0x8240, 0xa240
+       };
+
+       /*
+        * NCR SCSI Adapter (ADF 7f4f)
+        *
+        * POS register 2: (adf pos0)
+        * 
+        * 7 6 5 4 3 2 1 0
+        *     \_/ \___/ \__ enable: 0=adapter disabled, 1=adapter enabled
+        *      |      \____ I/O base (32B): 001=0x240 010=0x340 011=0x400
+        *      |              100=0x420 101=0x3240 110=0x8240 111=0xa240
+        *       \__________ IRQ: 00=3 01=5 10=7 11=9
+        *
+        * POS register 3: (adf pos1)
+        * 
+        * 7 6 5 4 3 2 1 0
+        * 1 1 1 | \_____/
+        *       |       \__ DMA level
+        *        \_________ Fairness: 1=enabled 0=disabled
+        *
+        * POS register 5: (adf pos3)
+        * 
+        * 7 6 5 4 3 2 1 0
+        * 1   |     \___/
+        *     |         \__ Static Ram: 0xC8000-0xC87FF + XX*0x4000
+        *      \___________ Host Adapter ID: 1=7 0=6
+        */
+
+       pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
+       pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
+       pos5 = mca_conf_read(ma->ma_mc, ma->ma_slot, 5);
+
+       iobase = ncrmca_iobase[(pos2 & 0x0e) >> 1];
+       irq = 3 + 2*((pos2 & 0x30) >> 4);
+       drq = (pos3 & 0x0f);
+       scsi_id = 6 + ((pos5 & 0x20) ? 1 : 0);
+
+       printf(" slot %d irq %d drq %d: NCR SCSI Adapter (53C90)\n",
+               ma->ma_slot + 1, irq, drq);
+
+       if (bus_space_map(ma->ma_iot, iobase, ESP_MCA_IOSIZE, 0, &ioh)) {
+               printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
+               return;
+       }
+
+       esc->sc_iot = ma->ma_iot;
+       esc->sc_ioh = ioh;
+
+       /* Setup DMA map */
+       esc->sc_dmat = ma->ma_dmat;
+       if ((error = mca_dmamap_create(esc->sc_dmat, MAXPHYS,
+            BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &esc->sc_xfer, drq)) != 0){
+                printf("%s: couldn't create DMA map - error %d\n",
+                        sc->sc_dev.dv_xname, error);
+                return;
+        }
+
+       sc->sc_id = scsi_id;
+       sc->sc_freq = 20;               /* Mhz */
+
+       /*
+        * Set up glue for MI code early; we use some of it here.
+        */
+       sc->sc_glue = &esp_glue;
+
+       /*
+        * It is necessary to try to load the 2nd config register here,
+        * to find out what rev the esp chip is, else the ncr53c9x_reset
+        * will not set up the defaults correctly.
+        */
+       sc->sc_cfg1 = sc->sc_id;
+       sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_RPE | NCRCFG2_DPE;
+       /* No point setting sc_cfg[345], they won't be used */
+
+       sc->sc_rev = NCR_VARIANT_ESP100;
+       sc->sc_minsync = 0;
+
+       /* max 64KB DMA */
+       sc->sc_maxxfer = 64 * 1024;
+
+       /* Establish interrupt */
+       esc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_BIO, ncr53c9x_intr,
+                       esc);
+       if (esc->sc_ih == NULL) {
+               printf("%s: couldn't establish interrupt\n",
+                   sc->sc_dev.dv_xname);
+               return;
+       }
+
+       /*
+        * Now try to attach all the sub-devices
+        */
+       sc->sc_adapter.adapt_minphys = minphys;
+       sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request;



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