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[src/trunk]: src/usr.bin/pmc A program for reading performance counters for e...



details:   https://anonhg.NetBSD.org/src/rev/d82f69b90c20
branches:  trunk
changeset: 498447:d82f69b90c20
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Tue Oct 24 23:54:31 2000 +0000

description:
A program for reading performance counters for execution of
a command.  From Frank van der Linden <fvdl%wasabisystems.com@localhost>.

diffstat:

 usr.bin/pmc/Makefile |   12 +
 usr.bin/pmc/pmc.1    |   92 +++++++++++++
 usr.bin/pmc/pmc.c    |  354 +++++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 458 insertions(+), 0 deletions(-)

diffs (truncated from 470 to 300 lines):

diff -r 9be293bfca6a -r d82f69b90c20 usr.bin/pmc/Makefile
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/usr.bin/pmc/Makefile      Tue Oct 24 23:54:31 2000 +0000
@@ -0,0 +1,12 @@
+#      $NetBSD: Makefile,v 1.1 2000/10/24 23:54:31 thorpej Exp $
+
+.if (${MACHINE_ARCH} == "i386")
+PROG=  pmc
+
+LDADD+=        -li386
+DPADD+=        ${LIBI386}
+.else
+MAN=   pmc.1
+.endif
+
+.include <bsd.prog.mk>
diff -r 9be293bfca6a -r d82f69b90c20 usr.bin/pmc/pmc.1
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/usr.bin/pmc/pmc.1 Tue Oct 24 23:54:31 2000 +0000
@@ -0,0 +1,92 @@
+.\"    $NetBSD: pmc.1,v 1.1 2000/10/24 23:54:31 thorpej Exp $
+.\"
+.\" Copyright (c) 2000 Zembu Labs, Inc.
+.\" All rights reserved.
+.\"
+.\" Author: Jason R. Thorpe <thorpej%zembu.com@localhost>
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
+.\" 1. Redistributions of source code must retain the above copyright
+.\"    notice, this list of conditions and the following disclaimer.
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\"    notice, this list of conditions and the following disclaimer in the
+.\"    documentation and/or other materials provided with the distribution.
+.\" 3. All advertising materials mentioning features or use of this software
+.\"    must display the following acknowledgement:
+.\"    This product includes software developed by Zembu Labs, Inc.
+.\" 4. Neither the name of Zembu Labs nor the names of its employees may
+.\"    be used to endorse or promote products derived from this software
+.\"    without specific prior written permission.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY ZEMBU LABS, INC. ``AS IS'' AND ANY EXPRESS
+.\" OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WAR-
+.\" RANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DIS-
+.\" CLAIMED.  IN NO EVENT SHALL ZEMBU LABS BE LIABLE FOR ANY DIRECT, INDIRECT,
+.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+.\"
+.Dd October 24, 2000
+.Dt PMC 1
+.Os NetBSD
+.Sh NAME
+.Nm pmc
+.Nd performance counter interface for command execution
+.Sh SYNOPSIS
+.Nm ""
+.Fl h
+.Nm ""
+.Fl C
+.Nm ""
+.Fl c
+.Ar event
+.Ar command
+.Oo
+.Ar options
+.Ar ...
+.Oc
+.Sh DESCRIPTION
+.Nm
+is a means of using a processor's performance counter facility to
+measure various aspects of a program's execution.  It is meant to
+be used in a fashion similar to
+.Xr time 1 .
+.Pp
+The arguments are as follows:
+.Bl -tag -width -indent
+.It Fl h
+Display a list of performance counter events available on the system.
+.It Fl C
+Cancel any performance counters that are currently running.
+.It Fl c Ar event
+Count the event specified by
+.Ar event
+while running the command.
+.El
+.Sh SEE ALSO
+.Xr time 1
+.Sh HISTORY
+The
+.Nm
+command first appeared in
+.Nx 1.6 .
+.Sh AUTHORS
+The
+.Nm
+command was written by
+.An Frank van der Linden
+.Aq fvdl%wasabisystems.com@localhost .
+The kernel support for reading performance counters on the i386
+architecture was written by
+.An Jason R. Thorpe
+.Aq thorpej%zembu.com@localhost .
+.Sh BUGS
+The
+.Nm
+command currently only supports 686-class performance counters on
+the i386 architecture.
diff -r 9be293bfca6a -r d82f69b90c20 usr.bin/pmc/pmc.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/usr.bin/pmc/pmc.c Tue Oct 24 23:54:31 2000 +0000
@@ -0,0 +1,354 @@
+/*     $NetBSD: pmc.c,v 1.1 2000/10/24 23:54:31 thorpej Exp $  */
+
+/*
+ * Copyright 2000 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Frank van der Linden for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed for the NetBSD Project by
+ *      Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *    or promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/types.h>
+#include <machine/sysarch.h>
+#include <machine/specialreg.h>
+#include <sys/wait.h>
+#include <err.h>
+#include <errno.h>
+#include <signal.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <unistd.h>
+
+const struct pmc_name2val {
+       const char *name;
+       int val;
+       int unit;
+} pmc_names[] = {
+       { "mem-refs",                   PMC6_DATA_MEM_REFS,             0 },
+       { "l1cache-lines",              PMC6_DCU_LINES_IN,              0 },
+       { "l1cache-mlines",             PMC6_DCU_M_LINES_IN,            0 },
+       { "l1cache-mlines-evict",       PMC6_DCU_M_LINES_OUT,           0 },
+       { "l1cache-miss-wait",          PMC6_DCU_MISS_OUTSTANDING,      0 },
+       { "ins-fetch",                  PMC6_IFU_IFETCH,                0 },
+       { "ins-fetch-misses",           PMC6_IFU_IFETCH_MISS,           0 },
+       { "itlb-misses",                PMC6_IFU_IFETCH_MISS,           0 },
+       { "insfetch-mem-stall",         PMC6_IFU_MEM_STALL,             0 },
+       { "insfetch-decode-stall",      PMC6_ILD_STALL,                 0 },
+
+       { "l2cache-insfetch",           PMC6_L2_IFETCH,                 0x0f },
+       { "l2cache-data-loads",         PMC6_L2_LD,                     0x0f },
+       { "l2cache-data-stores",        PMC6_L2_ST,                     0x0f },
+       { "l2cache-lines",              PMC6_L2_LINES_IN,               0 },
+       { "l2cache-lines-evict",        PMC6_L2_LINES_OUT,              0 },
+       { "l2cache-mlines",             PMC6_L2_M_LINES_INM,            0 },
+       { "l2cache-mlines-evict",       PMC6_L2_M_LINES_OUTM,           0x0f },
+       { "l2cache-reqs",               PMC6_L2_RQSTS,                  0 },
+       { "l2cache-addr-strobes",       PMC6_L2_ADS,                    0 },
+       { "l2cache-data-busy",          PMC6_L2_DBUS_BUSY,              0 },
+       { "l2cache-data-busy-read",     PMC6_L2_DBUS_BUSY_RD },
+
+       { "bus-drdy-clocks-self",       PMC6_BUS_DRDY_CLOCKS,           0x00 },
+       { "bus-drdy-clocks-any",        PMC6_BUS_DRDY_CLOCKS,           0x20 },
+       { "bus-lock-clocks-self",       PMC6_BUS_LOCK_CLOCKS,           0x00 },
+       { "bus-lock-clocks-any",        PMC6_BUS_LOCK_CLOCKS,           0x20 },
+       { "bus-req-outstanding-self",   PMC6_BUS_REQ_OUTSTANDING,       0x00 },
+       { "bus-req-outstanding-any",    PMC6_BUS_REQ_OUTSTANDING,       0x20 },
+       { "bus-burst-reads-self",       PMC6_BUS_TRAN_BRD,              0x00 },
+       { "bus-burst-reads-any",        PMC6_BUS_TRAN_BRD,              0x20 },
+       { "bus-read-for-ownership-self",PMC6_BUS_TRAN_RFO,              0x00 },
+       { "bus-read-for-ownership-any", PMC6_BUS_TRAN_RFO,              0x20 },
+       { "bus-write-back-self",        PMC6_BUS_TRANS_WB,              0x00 },
+       { "bus-write-back-any",         PMC6_BUS_TRANS_WB,              0x20 },
+       { "bus-ins-fetches-self",       PMC6_BUS_TRAN_IFETCH,           0x00 },
+       { "bus-ins-fetches-any",        PMC6_BUS_TRAN_IFETCH,           0x20 },
+       { "bus-invalidates-self",       PMC6_BUS_TRAN_INVAL,            0x00 },
+       { "bus-invalidates-any",        PMC6_BUS_TRAN_INVAL,            0x20 },
+       { "bus-partial-writes-self",    PMC6_BUS_TRAN_PWR,              0x00 },
+       { "bus-partial-writes-any",     PMC6_BUS_TRAN_PWR,              0x20 },
+       { "bus-partial-trans-self",     PMC6_BUS_TRANS_P,               0x00 },
+       { "bus-partial-trans-any",      PMC6_BUS_TRANS_P,               0x20 },
+       { "bus-io-trans-self",          PMC6_BUS_TRANS_IO,              0x00 },
+       { "bus-io-trans-any",           PMC6_BUS_TRANS_IO,              0x20 },
+       { "bus-deferred-trans-self",    PMC6_BUS_TRAN_DEF,              0x00 },
+       { "bus-deferred-trans-any",     PMC6_BUS_TRAN_DEF,              0x20 },
+       { "bus-burst-trans-self",       PMC6_BUS_TRAN_BURST,            0x00 },
+       { "bus-burst-trans-any",        PMC6_BUS_TRAN_BURST,            0x20 },
+       { "bus-total-trans-self",       PMC6_BUS_TRAN_ANY,              0x00 },
+       { "bus-total-trans-any",        PMC6_BUS_TRAN_ANY,              0x20 },
+       { "bus-mem-trans-self",         PMC6_BUS_TRAN_MEM,              0x00 },
+       { "bus-mem-trans-any",          PMC6_BUS_TRAN_MEM,              0x20 },
+       { "bus-recv-cycles",            PMC6_BUS_DATA_RCV,              0 },
+       { "bus-bnr-cycles",             PMC6_BUS_BNR_DRV,               0 },
+       { "bus-hit-cycles",             PMC6_BUS_HIT_DRV,               0 },
+       { "bus-hitm-cycles",            PMC6_BUS_HITM_DRDV,             0 },
+       { "bus-snoop-stall",            PMC6_BUS_SNOOP_STALL,           0 },
+
+       { "fpu-flops",                  PMC6_FLOPS,                     0 },
+       { "fpu-comp-ops",               PMC6_FP_COMP_OPS_EXE,           0 },
+       { "fpu-except-assist",          PMC6_FP_ASSIST,                 0 },
+       { "fpu-mul",                    PMC6_MUL,                       0 },
+       { "fpu-div",                    PMC6_DIV,                       0 },
+       { "fpu-div-busy",               PMC6_CYCLES_DIV_BUSY,           0 },
+
+       { "mem-sb-blocks",              PMC6_LD_BLOCKS,                 0 },
+       { "mem-sb-drains",              PMC6_SB_DRAINS,                 0 },
+       { "mem-misalign-ref",           PMC6_MISALIGN_MEM_REF,          0 },
+       { "ins-pref-dispatch-nta",      PMC6_EMON_KNI_PREF_DISPATCHED,  0x01 },
+       { "ins-pref-dispatch-t1",       PMC6_EMON_KNI_PREF_DISPATCHED,  0x01 },
+       { "ins-pref-dispatch-t2",       PMC6_EMON_KNI_PREF_DISPATCHED,  0x02 },
+       { "ins-pref-dispatch-weak",     PMC6_EMON_KNI_PREF_DISPATCHED,  0x03 },
+       { "ins-pref-miss-nta",          PMC6_EMON_KNI_PREF_MISS,        0x01 },
+       { "ins-pref-miss-t1",           PMC6_EMON_KNI_PREF_MISS,        0x01 },
+       { "ins-pref-miss-t2",           PMC6_EMON_KNI_PREF_MISS,        0x02 },
+       { "ins-pref-miss-weak",         PMC6_EMON_KNI_PREF_MISS,        0x03 },
+
+       { "ins-retired",                PMC6_INST_RETIRED,              0 },
+       { "uops-retired",               PMC6_UOPS_RETIRED,              0 },
+       { "ins-decoded",                PMC6_INST_DECODED,              0 },
+       { "ins-stream-retired-packed-scalar",
+           PMC6_EMON_KNI_INST_RETIRED, 0x00 },
+       { "ins-stream-retired-scalar",
+           PMC6_EMON_KNI_INST_RETIRED, 0x01 },
+       { "ins-stream-comp-retired-packed-scalar",
+           PMC6_EMON_KNI_COMP_INST_RET, 0x00 },
+       { "ins-stream-comp-retired--scalar",
+           PMC6_EMON_KNI_COMP_INST_RET, 0x01 },
+       
+
+       { "int-hw",                     PMC6_HW_INT_RX,                 0 },
+       { "int-cycles-masked",          PMC6_CYCLES_INT_MASKED,         0 },
+       { "int-cycles-masked-pending",  PMC6_CYCLES_INT_PENDING_AND_MASKED, 0 },
+
+       { "branch-retired",             PMC6_BR_INST_RETIRED,           0 },
+       { "branch-miss-retired",        PMC6_BR_MISS_PRED_RETIRED,      0 },
+       { "branch-taken-retired",       PMC6_BR_TAKEN_RETIRED,          0 },
+       { "branch-taken-mispred-retired", PMC6_BR_MISS_PRED_TAKEN_RET,  0 },
+       { "branch-decoded",             PMC6_BR_INST_DECODED,           0 },
+       { "branch-btb-miss",            PMC6_BTB_MISSES,                0 },
+       { "branch-bogus",               PMC6_BR_BOGUS,                  0 },
+       { "branch-baclear",             PMC6_BACLEARS,                  0 },
+
+       { "stall-resource",             PMC6_RESOURCE_STALLS,           0 },
+       { "stall-partial",              PMC6_PARTIAL_RAT_STALLS,        0 },
+
+       { "seg-loads",                  PMC6_SEGMENT_REG_LOADS,         0 },
+
+       { "unhalted-cycles",            PMC6_CPU_CLK_UNHALTED,          0 },
+
+       { "mmx-exec",                   PMC6_MMX_INSTR_EXEC,            0 },
+       { "mmx-sat-exec",               PMC6_MMX_SAT_INSTR_EXEC,        0 },
+       { "mmx-uops-exec",              PMC6_MMX_UOPS_EXEC,             0x0f },
+       { "mmx-exec-packed-mul",        PMC6_MMX_INSTR_TYPE_EXEC,       0x01 },
+       { "mmx-exec-packed-shift",      PMC6_MMX_INSTR_TYPE_EXEC,       0x02 },
+       { "mmx-exec-pack-ops",          PMC6_MMX_INSTR_TYPE_EXEC,       0x04 },
+       { "mmx-exec-unpack-ops",        PMC6_MMX_INSTR_TYPE_EXEC,       0x08 },
+       { "mmx-exec-packed-logical",    PMC6_MMX_INSTR_TYPE_EXEC,       0x10 },
+       { "mmx-exec-packed-arith",      PMC6_MMX_INSTR_TYPE_EXEC,       0x20 },
+       { "mmx-trans-mmx-float",        PMC6_FP_MMX_TRANS,              0x00 },
+       { "mmx-trans-float-mmx",        PMC6_FP_MMX_TRANS,              0x01 },
+       { "mmx-assist",                 PMC6_MMX_ASSIST,                0 },
+       { "mmx-retire",                 PMC6_MMX_INSTR_RET,             0 },
+
+       { "seg-rename-stalls-es",       PMC6_SEG_RENAME_STALLS,         0x01 },
+       { "seg-rename-stalls-ds",       PMC6_SEG_RENAME_STALLS,         0x02 },
+       { "seg-rename-stalls-fs",       PMC6_SEG_RENAME_STALLS,         0x04 },
+       { "seg-rename-stalls-gs",       PMC6_SEG_RENAME_STALLS,         0x08 },
+       { "seg-rename-stalls-all",      PMC6_SEG_RENAME_STALLS,         0x0f },
+       { "seg-rename-es",              PMC6_SEG_REG_RENAMES,           0x01 },



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