Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/dev/pci - Port clock calibration code (auich_calibrate) ...



details:   https://anonhg.NetBSD.org/src/rev/d5744dad0d7d
branches:  trunk
changeset: 534966:d5744dad0d7d
user:      kent <kent%NetBSD.org@localhost>
date:      Wed Aug 07 10:31:09 2002 +0000

description:
- Port clock calibration code (auich_calibrate) from ich.c of FreeBSD to solve
  kern/16373.
- SiS 7012 support from kern/17716 submitted by Quentin Garnier.
- ICH4 support
- Experimental support for nForce MCP, AMD768 and AMD8111.
- Rename the short name for ICH3: "i830M" -> "ICH3"

diffstat:

 sys/dev/pci/auich.c    |  282 +++++++++++++++++++++++++++++++++++++++++-------
 sys/dev/pci/auichreg.h |   20 +++-
 2 files changed, 260 insertions(+), 42 deletions(-)

diffs (truncated from 552 to 300 lines):

diff -r 77ebfaa29513 -r d5744dad0d7d sys/dev/pci/auich.c
--- a/sys/dev/pci/auich.c       Wed Aug 07 09:45:49 2002 +0000
+++ b/sys/dev/pci/auich.c       Wed Aug 07 10:31:09 2002 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: auich.c,v 1.17 2002/04/11 10:54:23 augustss Exp $      */
+/*     $NetBSD: auich.c,v 1.18 2002/08/07 10:31:09 kent Exp $  */
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -66,21 +66,55 @@
  *     from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp
  */
 
+/*
+ * Copyright (c) 2000 Katsurajima Naoto <raven%katsurajima.seya.yokohama.jp@localhost>
+ * Copyright (c) 2001 Cameron Grant <cg%freebsd.org@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * auich_calibrate() was from FreeBSD: ich.c,v 1.22 2002/06/27 22:36:01 scottl Exp 
+ */
+
+
 /* #define     ICH_DEBUG */
 /*
  * AC'97 audio found on Intel 810/820/440MX chipsets.
  *     http://developer.intel.com/design/chipsets/datashts/290655.htm
  *     http://developer.intel.com/design/chipsets/manuals/298028.htm
+ * ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm
+ * ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm
  *
  * TODO:
- *
- *     - Probe codecs for supported sample rates.
- *
  *     - Add support for the microphone input.
+ *     - 4ch/6ch support.
+ *     - auich_calibrate() is called in auich_open().  It causes about 0.1sec
+ *       delay in the first open().  auich_calibrate() should be called in
+ *       auich_attach().  However microtime() doesn't work in the attach
+ *       stage.
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.17 2002/04/11 10:54:23 augustss Exp $");
+__KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.18 2002/08/07 10:31:09 kent Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -168,7 +202,13 @@
 
        struct auich_dma *sc_dmas;
 
-       int  sc_fixed_rate;
+       int sc_fixed_rate;
+       int sc_ac97rate;
+       int sc_ignore_codecready;
+
+       /* SiS 7012 hack */
+       int  sc_sample_size;
+       int  sc_sts_reg;
 
        void (*sc_pintr)(void *);
        void *sc_parg;
@@ -233,6 +273,7 @@
 
 void   auich_powerhook(int, void *);
 int    auich_set_rate(struct auich_softc *sc, int mode, uint srate);
+unsigned int auich_calibrate(struct auich_softc *sc);
 
 
 struct audio_hw_if auich_hw_if = {
@@ -271,23 +312,33 @@
 void   auich_reset_codec(void *);
 
 static const struct auich_devtype {
+       int     vendor;
        int     product;
        const char *name;
        const char *shortname;
 } auich_devices[] = {
-       { PCI_PRODUCT_INTEL_82801AA_ACA,
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_ACA,
            "i82801AA (ICH) AC-97 Audio",       "ICH" },
-       { PCI_PRODUCT_INTEL_82801AB_ACA,
-           "i82801AB (ICH0) AC-97 Audio",      "ICH0" },
-       { PCI_PRODUCT_INTEL_82801BA_ACA,
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_ACA,
+           "i82801AB (ICH0) AC-97 Audio",      "ICH0" }, /* i810-L */
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_ACA,
            "i82801BA (ICH2) AC-97 Audio",      "ICH2" },
-       { PCI_PRODUCT_INTEL_82440MX_ACA,
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82440MX_ACA,
            "i82440MX AC-97 Audio",             "440MX" },
-       { PCI_PRODUCT_INTEL_82801CA_AC,
-           "i82801CA AC-97 Audio",             "i830M" },
-
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_AC,
+           "i82801CA (ICH3) AC-97 Audio",      "ICH3" }, /* i830Mx i845MP/MZ*/
+       { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_AC,
+           "i82801DB (ICH4) AC-97 Audio",      "ICH4" }, /* i845E i845Gx */
+       { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7012_AC,
+           "SiS 7012 AC-97 Audio",             "SiS7012" },
+       { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_MCP_AC,
+           "nForce MCP AC-97 Audio",           "nForce-MCP" },
+       { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC768_AC,
+           "AMD768 AC-97 Audio",               "AMD768" },
+       { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_AC,
+           "AMD8111 AC-97 Audio",              "AMD8111" },
        { 0,
-           NULL,                       NULL },
+           NULL,                               NULL },
 };
 
 static const struct auich_devtype *
@@ -295,11 +346,9 @@
 {
        const struct auich_devtype *d;
 
-       if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
-               return (NULL);
-
        for (d = auich_devices; d->name != NULL; d++) {
-               if (PCI_PRODUCT(pa->pa_id) == d->product)
+               if (PCI_VENDOR(pa->pa_id) == d->vendor
+                       && PCI_PRODUCT(pa->pa_id) == d->product)
                        return (d);
        }
 
@@ -328,6 +377,7 @@
        const char *intrstr;
        const struct auich_devtype *d;
        u_int16_t ext_id, ext_status;
+       u_int32_t status;
 
        d = auich_lookup(pa);
        if (d == NULL)
@@ -375,6 +425,16 @@
        sprintf(sc->sc_audev.version, "0x%02x", PCI_REVISION(pa->pa_class));
        strcpy(sc->sc_audev.config, sc->sc_dev.dv_xname);
 
+       /* SiS 7012 needs special handling */
+       if (d->vendor == PCI_VENDOR_SIS
+           && d->product == PCI_PRODUCT_SIS_7012_AC) {
+               sc->sc_sts_reg = ICH_PICB;
+               sc->sc_sample_size = 1;
+       } else {
+               sc->sc_sts_reg = ICH_STS;
+               sc->sc_sample_size = 2;
+       }
+
        /* Set up DMA lists. */
        sc->ptr_pcmo = sc->ptr_pcmi = sc->ptr_mici = 0;
        auich_alloc_cdata(sc);
@@ -384,6 +444,23 @@
 
        /* Reset codec and AC'97 */
        auich_reset_codec(sc);
+       status = bus_space_read_4(sc->iot, sc->aud_ioh, ICH_GSTS);
+       if (!(status & ICH_PCR)) { /* reset failure */
+               if (d->vendor == PCI_VENDOR_INTEL
+                   && d->product == PCI_PRODUCT_INTEL_82801DB_AC) {
+                       /* MSI 845G Max never return ICH_PCR */
+                       sc->sc_ignore_codecready = TRUE;
+               } else {
+                       return;
+               }
+       }
+       /* Print capabilities though there are no supports for now */
+       if ((status & ICH_SAMPLE_CAP) == ICH_POM20)
+               printf("%s: 20 bit precision support\n", sc->sc_dev.dv_xname);
+       if ((status & ICH_CHAN_CAP) == ICH_PCM4)
+               printf("%s: 4ch PCM output support\n", sc->sc_dev.dv_xname);
+       if ((status & ICH_CHAN_CAP) == ICH_PCM6)
+               printf("%s: 6ch PCM output support\n", sc->sc_dev.dv_xname);
 
        sc->host_if.arg = sc;
        sc->host_if.attach = auich_attach_codec;
@@ -404,10 +481,12 @@
                auich_write_codec(sc, AC97_REG_EXTENDED_STATUS, ext_status);
 
                /* so it claims to do variable rate, let's make sure */
+               sc->sc_ac97rate = FIXED_RATE;
                if (auich_set_rate(sc, AUMODE_PLAY, 44100) == 44100)
                        sc->sc_fixed_rate = 0;
                else
                        sc->sc_fixed_rate = FIXED_RATE;
+               sc->sc_ac97rate = 0;
        } else {
                sc->sc_fixed_rate = FIXED_RATE;
        }
@@ -429,8 +508,9 @@
        int i;
        uint32_t status;
 
-       if (!(bus_space_read_4(sc->iot, sc->aud_ioh, ICH_GSTS) & ICH_PCR)) {
-               printf("auich_read_codec: codec is not ready.");
+       status = bus_space_read_4(sc->iot, sc->aud_ioh, ICH_GSTS);
+       if (!sc->sc_ignore_codecready && !(status & ICH_PCR)) {
+               printf("auich_read_codec: codec is not ready (0x%x)\n", status);
                *val = 0xffff;
                return -1;
        }
@@ -464,7 +544,8 @@
        int i;
 
        DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val));
-       if (!(bus_space_read_4(sc->iot, sc->aud_ioh, ICH_GSTS) & ICH_PCR)) {
+       if (!sc->sc_ignore_codecready
+           && !(bus_space_read_4(sc->iot, sc->aud_ioh, ICH_GSTS) & ICH_PCR)) {
                printf("auich_write_codec: codec is not ready.");
                return -1;
        }
@@ -497,20 +578,27 @@
 {
        struct auich_softc *sc = v;
        int i;
+       uint32_t control;
 
-       bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, 0);
-       DELAY(10);
-       bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, ICH_CRESET);
+       control = bus_space_read_4(sc->iot, sc->aud_ioh, ICH_GCTRL);
+       control &= ~(ICH_ACLSO | ICH_PCM246_MASK);
+       control |= (control & ICH_CRESET) ? ICH_WRESET : ICH_CRESET;
+       bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, control);
 
        for (i = 500000; i-- &&
               !(bus_space_read_4(sc->iot, sc->aud_ioh, ICH_GSTS) & ICH_PCR);
             DELAY(1));                                 /*       or ICH_SCR? */
+       if (i <= 0)
+               printf("%s: auich_reset_codec: time out\n", sc->sc_dev.dv_xname);
 }
 
 int
 auich_open(void *v, int flags)
 {
+       struct auich_softc *sc = v;
 
+       if (!sc->sc_fixed_rate && sc->sc_ac97rate == 0)
+               sc->sc_ac97rate = auich_calibrate(sc);
        return 0;
 }
 
@@ -588,23 +676,26 @@
 auich_set_rate(struct auich_softc *sc, int mode, uint srate)
 {
        u_int16_t val, rate, inout;
+       u_int32_t rvalue;
 
        inout = mode == AUMODE_PLAY ? ICH_PM_PCMO : ICH_PM_PCMI;
 
        auich_read_codec(sc, AC97_REG_POWER, &val);
        auich_write_codec(sc, AC97_REG_POWER, val | inout);
-       
+
+       rvalue = srate * FIXED_RATE / sc->sc_ac97rate;
        if (mode == AUMODE_PLAY) {
-               auich_write_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, srate);
+               auich_write_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, rvalue);
                auich_read_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, &rate);
        } else {
-               auich_write_codec(sc, AC97_REG_PCM_LR_ADC_RATE, srate);
+               auich_write_codec(sc, AC97_REG_PCM_LR_ADC_RATE, rvalue);
                auich_read_codec(sc, AC97_REG_PCM_LR_ADC_RATE, &rate);
        }
-       
+
        auich_write_codec(sc, AC97_REG_POWER, val);
 
-       return rate;
+       rvalue = rate * sc->sc_ac97rate / FIXED_RATE;
+       return rvalue;
 }
 
 int
@@ -641,8 +732,12 @@
                /* setup hardware formats */
                p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE;
                p->hw_precision = 16;



Home | Main Index | Thread Index | Old Index