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[src/trunk]: src/sys/dev Beginning of a IEEE 1394 framework. An attachment f...
details: https://anonhg.NetBSD.org/src/rev/d64cc7a21967
branches: trunk
changeset: 486894:d64cc7a21967
user: matt <matt%NetBSD.org@localhost>
date: Tue May 30 06:56:13 2000 +0000
description:
Beginning of a IEEE 1394 framework. An attachment for PCI OHCI controllers
and bus-independent module that just begins to print things out. No real
code behind it. THIS IS A WORK IN PROGRESS. The *reg.h are woefully
incomplete.
diffstat:
sys/dev/ieee1394/fwohci.c | 126 +++++++++++++
sys/dev/ieee1394/fwohcireg.h | 377 +++++++++++++++++++++++++++++++++++++++++
sys/dev/ieee1394/fwohcivar.h | 57 ++++++
sys/dev/ieee1394/ieee1394reg.h | 49 +++++
sys/dev/ieee1394/ieee1394var.h | 50 +++++
sys/dev/pci/fwohci_pci.c | 131 ++++++++++++++
6 files changed, 790 insertions(+), 0 deletions(-)
diffs (truncated from 814 to 300 lines):
diff -r 3e3a2187977b -r d64cc7a21967 sys/dev/ieee1394/fwohci.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/dev/ieee1394/fwohci.c Tue May 30 06:56:13 2000 +0000
@@ -0,0 +1,126 @@
+/*-
+ * Copyright (c) 2000 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas of 3am Software Foundry.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <sys/device.h>
+
+#include <machine/bus.h>
+
+#include <dev/ieee1394/ieee1394reg.h>
+#include <dev/ieee1394/fwohcireg.h>
+
+#include <dev/ieee1394/ieee1394var.h>
+#include <dev/ieee1394/fwohcivar.h>
+
+static const char * const ieee1394_speeds[] = { IEEE1394_SPD_STRINGS };
+
+int
+fwohci_init(struct fwohci_softc *sc)
+{
+ u_int32_t val;
+
+ /* What dialect of OHCI is this device?
+ */
+ val = OHCI_CSR_READ(sc, OHCI_REG_Version);
+ printf("%s: OHCI %u.%u", sc->sc_sc1394.sc1394_dev.dv_xname,
+ OHCI_Version_GET_Version(val), OHCI_Version_GET_Revision(val));
+
+ /* Is the Global UID ROM present?
+ */
+ if ((val & OHCI_Version_GUID_ROM) == 0) {
+ printf("\n%x: fatal: no global UID ROM\n", sc->sc_sc1394.sc1394_dev.dv_xname);
+ return -1;
+ }
+
+ /* Extract the Global UID
+ */
+ val = OHCI_CSR_READ(sc, OHCI_REG_GUIDHi);
+ sc->sc_sc1394.sc1394_guid[0] = (val >> 24) & 0xff;
+ sc->sc_sc1394.sc1394_guid[1] = (val >> 16) & 0xff;
+ sc->sc_sc1394.sc1394_guid[2] = (val >> 8) & 0xff;
+ sc->sc_sc1394.sc1394_guid[3] = (val >> 0) & 0xff;
+
+ val = OHCI_CSR_READ(sc, OHCI_REG_GUIDLo);
+ sc->sc_sc1394.sc1394_guid[4] = (val >> 24) & 0xff;
+ sc->sc_sc1394.sc1394_guid[5] = (val >> 16) & 0xff;
+ sc->sc_sc1394.sc1394_guid[6] = (val >> 8) & 0xff;
+ sc->sc_sc1394.sc1394_guid[7] = (val >> 0) & 0xff;
+
+ printf(", %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
+ sc->sc_sc1394.sc1394_guid[0], sc->sc_sc1394.sc1394_guid[1],
+ sc->sc_sc1394.sc1394_guid[2], sc->sc_sc1394.sc1394_guid[3],
+ sc->sc_sc1394.sc1394_guid[4], sc->sc_sc1394.sc1394_guid[5],
+ sc->sc_sc1394.sc1394_guid[6], sc->sc_sc1394.sc1394_guid[7]);
+
+ /* Get the maximum link speed and receive size
+ */
+ val = OHCI_CSR_READ(sc, OHCI_REG_BusOptions);
+ sc->sc_sc1394.sc1394_link_speed =
+ (val & OHCI_BusOptions_LinkSpd_MASK)
+ >> OHCI_BusOptions_LinkSpd_BITPOS;
+ if (sc->sc_sc1394.sc1394_link_speed < IEEE1394_SPD_MAX) {
+ printf(", %s", ieee1394_speeds[sc->sc_sc1394.sc1394_link_speed]);
+ } else {
+ printf(", unknown speed %u", sc->sc_sc1394.sc1394_link_speed);
+ }
+
+ /* MaxRec is encoded as log2(max_rec_octets)-1
+ */
+ sc->sc_sc1394.sc1394_max_receive =
+ 1 << (((val & OHCI_BusOptions_MaxRec_MASK)
+ >> OHCI_BusOptions_MaxRec_BITPOS) + 1);
+ printf(", %u byte packets max", sc->sc_sc1394.sc1394_max_receive);
+
+ printf("\n");
+ return 0;
+}
+
+int
+fwohci_intr(void *arg)
+{
+ struct fwohci_softc * const sc = arg;
+ int progress = 0;
+
+ for (;;) {
+ u_int32_t intmask = OHCI_CSR_READ(sc, OHCI_REG_IntEventClear);
+ if (intmask == 0)
+ return progress;
+ OHCI_CSR_WRITE(sc, OHCI_REG_IntEventClear, intmask);
+ progress = 1;
+ }
+}
diff -r 3e3a2187977b -r d64cc7a21967 sys/dev/ieee1394/fwohcireg.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/dev/ieee1394/fwohcireg.h Tue May 30 06:56:13 2000 +0000
@@ -0,0 +1,377 @@
+/*-
+ * Copyright (c) 2000 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas of 3am Software Foundry.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _DEV_IEEE1394_FWOHCIREG_H_
+#define _DEV_IEEE1394_FWOHCIREG_H_
+
+/* PCI/CardBus-Specific definitions
+ */
+
+/* In the PCI Class Code Register ...
+ */
+#define PCI_INTERFACE_OHCI 0x10
+
+/* The OHCI Regisers are in PCI BAR0.
+ */
+#define PCI_OHCI_MAP_REGISTER 0x10
+
+/* HCI Control Register (in PCI config space)
+ */
+#define PCI_OHCI_CONTROL_REGISTER 0x40
+
+/* If the following bit, all OHCI register access
+ * and DMA transactions are byte swapped.
+ */
+#define PCI_GLOBAL_SWAP_BE 0x00000001
+
+/* Bus Independent Definitions */
+
+/* OHCI Registers
+ * OHCI Registers are divided into four spaces:
+ * 1) 0x000 .. 0x17C = Control register space
+ * 2) 0x180 .. 0x1FC = Asynchronous DMA context register space
+ * (4 contexts)
+ * 3) 0x200 .. 0x3FC = Isochronous Transmit DMA context register space
+ * (32 contexts)
+ * 4) 0x400 .. 0x7FC = Isochronous Receive DMA context register space
+ * (32 contexts)
+ */
+#define OHCI_REG_Version 0x000
+#define OHCI_REG_Guid_Rom 0x004
+#define OHCI_REG_ATRetries 0x008
+#define OHCI_REG_CsrReadData 0x00c
+#define OHCI_REG_CsrCompareData 0x010
+#define OHCI_REG_CsrControl 0x014
+#define OHCI_REG_ConfigROMhdr 0x018
+#define OHCI_REG_BusId 0x01c
+#define OHCI_REG_BusOptions 0x020
+#define OHCI_REG_GUIDHi 0x024
+#define OHCI_REG_GUIDLo 0x028
+#define OHCI_REG_reserved_02c 0x02c
+#define OHCI_REG_reserved_030 0x030
+#define OHCI_REG_ConfigROMmap 0x034
+#define OHCI_REG_PostedWriteAddressLo 0x038
+#define OHCI_REG_PostedWriteAddressHi 0x03c
+#define OHCI_REG_VendorId 0x040
+#define OHCI_REG_reserved_044 0x044
+#define OHCI_REG_reserved_048 0x048
+#define OHCI_REG_reserved_04c 0x04c
+#define OHCI_REG_HCControlSet 0x050
+#define OHCI_REG_HCControlClear 0x054
+#define OHCI_REG_reserved_058 0x058
+#define OHCI_REG_reserved_05c 0x05c
+#define OHCI_REG_reserved_060 0x060
+#define OHCI_REG_SelfIDBuffer 0x064
+#define OHCI_REG_SelfIDCount 0x068
+#define OHCI_REG_reserved_06c 0x06c
+#define OHCI_REG_IRMultiChanMaskHiSet 0x070
+#define OHCI_REG_IRMultiChanMaskHiClear 0x074
+#define OHCI_REG_IRMultiChanMaskLoSet 0x078
+#define OHCI_REG_IRMultiChanMaskLoClear 0x07c
+#define OHCI_REG_IntEventSet 0x080
+#define OHCI_REG_IntEventClear 0x084
+#define OHCI_REG_IntMaskSet 0x088
+#define OHCI_REG_IntMaskClear 0x08c
+#define OHCI_REG_IsoXmitIntEventSet 0x090
+#define OHCI_REG_IsoXmitIntEventClear 0x094
+#define OHCI_REG_IsoXmitIntMaskSet 0x098
+#define OHCI_REG_IsoXmitIntMaskClear 0x09c
+#define OHCI_REG_IsoRecvIntEventSet 0x0a0
+#define OHCI_REG_IsoRecvIntEventClear 0x0a4
+#define OHCI_REG_IsoRecvIntMaskSet 0x0a8
+#define OHCI_REG_IsoRecvIntMaskClear 0x0ac
+#define OHCI_REG_InitialBandwidthAvailable 0x0b0
+#define OHCI_REG_InitialChannelsAvailableHi 0x0b4
+#define OHCI_REG_InitialChannelsAvailableLo 0x0b8
+#define OHCI_REG_reserved_0bc 0x0bc
+#define OHCI_REG_reserved_0c0 0x0c0
+#define OHCI_REG_reserved_0c4 0x0c4
+#define OHCI_REG_reserved_0c8 0x0c8
+#define OHCI_REG_reserved_0cc 0x0cc
+#define OHCI_REG_reserved_0d0 0x0d0
+#define OHCI_REG_reserved_0d4 0x0d4
+#define OHCI_REG_reserved_0d8 0x0d8
+#define OHCI_REG_FairnessConctrol 0x0dc
+#define OHCI_REG_LinkControlSet 0x0e0
+#define OHCI_REG_LinkControlClear 0x0e4
+#define OHCI_REG_NodeId 0x0e8
+#define OHCI_REG_PhyControl 0x0ec
+#define OHCI_REG_IsochronousCycleTimer 0x0f0
+#define OHCI_REG_reserved_0f0 0x0f4
+#define OHCI_REG_reserved_0f8 0x0f8
+#define OHCI_REG_reserved_0fc 0x0fc
+#define OHCI_REG_AsynchronousRequestFilterHiSet 0x100
+#define OHCI_REG_AsynchronousRequestFilterHiClear 0x104
+#define OHCI_REG_AsynchronousRequestFilterLoSet 0x108
+#define OHCI_REG_AsynchronousRequestFilterLoClear 0x10c
+#define OHCI_REG_PhysicalRequestFilterHiSet 0x110
+#define OHCI_REG_PhysicalRequestFilterHiClear 0x114
+#define OHCI_REG_PhysicalRequestFilterLoSet 0x118
+#define OHCI_REG_PhysicalRequestFilterLoCLear 0x11c
+#define OHCI_REG_PhysicalUpperBound 0x120
+#define OHCI_REG_reserved_124 0x124
+#define OHCI_REG_reserved_128 0x128
+#define OHCI_REG_reserved_12c 0x12c
+#define OHCI_REG_reserved_130 0x130
+#define OHCI_REG_reserved_134 0x134
+#define OHCI_REG_reserved_138 0x138
+#define OHCI_REG_reserved_13c 0x13c
+#define OHCI_REG_reserved_140 0x140
+#define OHCI_REG_reserved_144 0x144
+#define OHCI_REG_reserved_148 0x148
+#define OHCI_REG_reserved_14c 0x14c
+#define OHCI_REG_reserved_150 0x150
+#define OHCI_REG_reserved_154 0x154
+#define OHCI_REG_reserved_158 0x158
+#define OHCI_REG_reserved_15c 0x15c
+#define OHCI_REG_reserved_160 0x160
+#define OHCI_REG_reserved_164 0x164
+#define OHCI_REG_reserved_168 0x168
+#define OHCI_REG_reserved_16c 0x16c
+#define OHCI_REG_reserved_170 0x170
+#define OHCI_REG_reserved_174 0x174
+#define OHCI_REG_reserved_178 0x178
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