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[src/trunk]: src/sys/arch/arc OpenBSD-2.1/arc
details: https://anonhg.NetBSD.org/src/rev/d14a2c73057c
branches: trunk
changeset: 481123:d14a2c73057c
user: soda <soda%NetBSD.org@localhost>
date: Sun Jan 23 20:24:23 2000 +0000
description:
OpenBSD-2.1/arc
diffstat:
sys/arch/arc/algor/algor.h | 115 +
sys/arch/arc/algor/algorbus.c | 440 ++++
sys/arch/arc/arc/arcbios.c | 364 +++
sys/arch/arc/arc/arcbios.h | 339 +++
sys/arch/arc/arc/clockvar.h | 5 +-
sys/arch/arc/arc/cpu_exec.c | 112 +
sys/arch/arc/arc/fp.S | 3611 +++++++++++++++++++++++++++++++++
sys/arch/arc/arc/genassym.cf | 57 +
sys/arch/arc/arc/mem.c | 182 +
sys/arch/arc/arc/process_machdep.c | 116 +
sys/arch/arc/arc/swapgeneric.c | 61 +
sys/arch/arc/compile/.cvsignore | 5 +
sys/arch/arc/conf/ARCTIC | 138 +
sys/arch/arc/conf/P4032 | 117 +
sys/arch/arc/conf/RAMDISK | 148 +
sys/arch/arc/conf/ld.script | 74 +
sys/arch/arc/dev/fdreg.h | 3 +-
sys/arch/arc/dev/rd_root.c | 80 +
sys/arch/arc/dti/btl.c | 1438 +++++++++++++
sys/arch/arc/dti/btlreg.h | 309 ++
sys/arch/arc/dti/desktech.h | 68 +
sys/arch/arc/include/dlfcn.h | 42 +
sys/arch/arc/include/ecoff.h | 94 +
sys/arch/arc/include/elf_abi.h | 58 +
sys/arch/arc/include/exec.h | 56 +
sys/arch/arc/include/intr.h | 174 +
sys/arch/arc/include/link.h | 125 +
sys/arch/arc/include/memconf.h | 50 +
sys/arch/arc/include/mouse.h | 7 +-
sys/arch/arc/include/pio.h | 14 +-
sys/arch/arc/isa/isa_machdep.h | 85 +
sys/arch/arc/isa/isadma.c | 317 ++
sys/arch/arc/isa/isadmareg.h | 22 +
sys/arch/arc/pci/pbcpcibus.c | 416 +++
sys/arch/arc/pci/pci_machdep.h | 93 +
sys/arch/arc/pci/pcibrvar.h | 48 +
sys/arch/arc/pci/v962pcbreg.h | 312 ++
sys/arch/arc/stand/Makefile | 5 +
sys/arch/arc/stand/libsa/Makefile | 14 +
sys/arch/arc/stand/libsa/devopen.c | 128 +
sys/arch/arc/stand/libsa/getenv.c | 45 +
sys/arch/arc/stand/libsa/getputchar.c | 69 +
sys/arch/arc/stand/mbr/Makefile | 20 +
sys/arch/arc/stand/mbr/mbr.uu | 15 +
sys/arch/arc/stand/mbr/msdos5mb.gz.uu | 208 +
45 files changed, 10192 insertions(+), 7 deletions(-)
diffs (truncated from 10422 to 300 lines):
diff -r 09839fe97156 -r d14a2c73057c sys/arch/arc/algor/algor.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arc/algor/algor.h Sun Jan 23 20:24:23 2000 +0000
@@ -0,0 +1,115 @@
+/* $OpenBSD: algor.h,v 1.3 1997/04/19 17:19:36 pefo Exp $ */
+
+/*
+ * Copyright (c) 1996 Per Fogelstrom
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed under OpenBSD by
+ * Per Fogelstrom.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _ALGOR_H_
+#define _ALGOR_H_ 1
+
+/*
+ * P-4032's Physical address space
+ */
+
+#define P4032_PHYS_MIN 0x00000000 /* 256 Meg */
+#define P4032_PHYS_MAX 0x0fffffff
+
+/*
+ * Memory map
+ */
+
+#define P4032_PHYS_MEMORY_START 0x00000000
+#define P4032_PHYS_MEMORY_END 0x0fffffff /* 256 Meg in 2 slots */
+
+/*
+ * I/O map
+ */
+
+#define P4032_V96x 0xbef00000 /* PCI Bus bridge ctrlregs */
+
+#define P4032_CLOCK 0xbff00000 /* RTC clock ptr reg */
+#define P4032_KEYB 0xbff10000 /* PC Keyboard controller */
+#define P4032_LED 0xbff20010 /* 4 Char LED display */
+#define P4032_LCD 0xbff30000 /* LCD option display */
+#define P4032_GPIO 0xbff40000 /* General purpose I/O */
+#define P4032_GPIO_IACK 0xbff50000 /* General purpose I/O Iack */
+#define P4032_FPY 0xbff807c0 /* Floppy controller */
+#define P4032_COM1 0xbff80fe0 /* Serial port com1 */
+#define P4032_COM2 0xbff80be0 /* Serial port com2 */
+#define P4032_CENTR 0xbff80de0 /* Centronics paralell port */
+#define P4032_IMR 0xbff90000 /* Int mask reg (wr) */
+#define P4032_IRR 0xbff90000 /* Int request reg (rd) */
+#define P4032_EIRR 0xbff90004 /* Error int request reg (rd) */
+#define P4032_ICR 0xbff90004 /* Int clear register (wr) */
+#define P4032_PCIIMR 0xbff90008 /* PCI Int mask reg (wr) */
+#define P4032_PCIIRR 0xbff90008 /* PCI Int req reg (rd) */
+#define P4032_IXR0 0xbff9000c /* Int crossbar register 0 */
+#define P4032_IXR1 0xbff90010 /* Int crossbar register 0 */
+#define P4032_IXR2 0xbff90014 /* Int crossbar register 0 */
+
+/*
+ * Interrupt controller interrupt masks
+ */
+
+#define P4032_IM_RTC 0x80 /* RT Clock */
+#define P4032_IM_GPIO 0x40 /* General purpose I/O */
+#define P4032_IM_CENTR 0x20 /* Centronics paralell port */
+#define P4032_IM_COM2 0x10 /* Serial port 2 */
+#define P4032_IM_COM1 0x08 /* Serial port 1 */
+#define P4032_IM_KEYB 0x04 /* PC Keyboard IFC */
+#define P4032_IM_FPY 0x02 /* Floppy disk */
+#define P4032_IM_PCI 0x01 /* PCI controller */
+
+#define P4032_IRR_BER 0x04 /* Bus error */
+#define P4032_IRR_PFAIL 0x02 /* Power fail */
+#define P4032_IRR_DBG 0x01 /* Debug switch */
+
+#define P4032_PCI_IRQ3 0x80 /* PCI interrupt request 3 */
+#define P4032_PCI_IRQ2 0x40 /* PCI interrupt request 2 */
+#define P4032_PCI_IRQ1 0x20 /* PCI interrupt request 1 */
+#define P4032_PCI_IRQ0 0x10 /* PCI interrupt request 0 */
+#define P4032_FPY_DMA 0x08 /* FPY "DMA" interrupt request */
+/*
+ * Interrupt vector descriptor for device on pica bus.
+ */
+struct algor_int_desc {
+ int int_mask; /* Mask used in PICA_SYS_LB_IE */
+ intr_handler_t int_hand; /* Interrupt handler */
+ void *param; /* Parameter to send to handler */
+ int spl_mask; /* Spl mask for interrupt */
+};
+
+int algor_intrnull __P((void *));
+void *algor_pci_intr_establish __P((int, int, intr_handler_t, void *, void *));
+void algor_pci_intr_disestablish __P((void *));
+
+
+#endif /* _ALGOR_H_ */
diff -r 09839fe97156 -r d14a2c73057c sys/arch/arc/algor/algorbus.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arc/algor/algorbus.c Sun Jan 23 20:24:23 2000 +0000
@@ -0,0 +1,440 @@
+/* $OpenBSD: algorbus.c,v 1.3 1997/04/19 17:19:37 pefo Exp $ */
+
+/*
+ * Copyright (c) 1996 Per Fogelstrom
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed under OpenBSD by
+ * Per Fogelstrom.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/proc.h>
+#include <sys/user.h>
+#include <sys/device.h>
+
+#include <machine/pte.h>
+#include <machine/cpu.h>
+#include <machine/pio.h>
+#include <machine/intr.h>
+#include <machine/autoconf.h>
+
+#include <arc/arc/arctype.h>
+#include <arc/algor/algor.h>
+
+#include <dev/ic/mc146818reg.h>
+
+struct algor_softc {
+ struct device sc_dv;
+ struct abus sc_bus;
+ struct algor_dev *sc_devs;
+};
+
+/* Definition of the driver for autoconfig. */
+int algormatch(struct device *, void *, void *);
+void algorattach(struct device *, struct device *, void *);
+int algorprint(void *, const char *);
+
+struct cfattach algor_ca = {
+ sizeof(struct algor_softc), algormatch, algorattach
+};
+struct cfdriver algor_cd = {
+ NULL, "algor", DV_DULL, NULL, 0
+};
+
+void algor_intr_establish __P((struct confargs *, int (*)(void *), void *));
+void algor_intr_disestablish __P((struct confargs *));
+caddr_t algor_cvtaddr __P((struct confargs *));
+int algor_matchname __P((struct confargs *, char *));
+int algor_iointr __P((unsigned, struct clockframe *));
+int algor_clkintr __P((unsigned, struct clockframe *));
+int algor_errintr __P((unsigned, struct clockframe *));
+
+extern int cputype;
+
+int p4032_imask = 0;
+int p4032_ixr = 0;
+
+/*
+ * Interrupt dispatch table.
+ */
+static struct algor_int_desc int_table[] = {
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 0 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 1 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 2 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 3 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 4 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 5 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 6 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 7 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 8 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 9 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 10 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 11 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 12 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 13 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 14 */
+ {0, algor_intrnull, (void *)NULL, 0 }, /* 15 */
+};
+#define NUM_INT_SLOTS (sizeof(int_table) / sizeof(struct algor_int_desc))
+
+struct algor_dev {
+ struct confargs ps_ca;
+ u_int8_t ps_mask;
+ u_int8_t ps_ipl;
+ u_int16_t ps_route;
+ intr_handler_t ps_handler;
+ void *ps_base;
+};
+struct algor_dev algor_4032_cpu[] = {
+ {{ "dallas_rtc", 0, 0, },
+ P4032_IM_RTC, IPL_CLOCK, 0xc000, algor_intrnull, (void *)P4032_CLOCK, },
+ {{ "com", 1, 0, },
+ P4032_IM_COM1, IPL_TTY, 0x00c0, algor_intrnull, (void *)P4032_COM1, },
+ {{ "com", 2, 0, },
+ P4032_IM_COM2, IPL_TTY, 0x0300, algor_intrnull, (void *)P4032_COM2, },
+ {{ "lpt", 3, 0, },
+ P4032_IM_CENTR,IPL_TTY, 0x0c00, algor_intrnull, (void *)P4032_CENTR, },
+ {{ NULL, -1, NULL, },
+ 0, 0x0000, NULL, (void *)NULL, },
+};
+#define NUM_ALGOR_DEVS (sizeof(algor_4032_cpu) / sizeof(struct algor_dev))
+
+/* IPL routing values */
+static int ipxrtab[] = {
+ 0x000000, /* IPL_BIO */
+ 0x555555, /* IPL_NET */
+ 0xaaaaaa, /* IPL_TTY */
+ 0xffffff, /* IPL_CLOCK */
+};
+
+
+
+struct algor_dev *algor_cpu_devs[] = {
+ NULL, /* Unused */
+ NULL, /* Unused */
+ NULL, /* Unused */
+ NULL, /* Unused */
+ NULL, /* Unused */
+ NULL, /* Unused */
+ algor_4032_cpu, /* 6 = ALGORITHMICS R4032 Board */
+ NULL,
+};
+int nalgor_cpu_devs = sizeof algor_cpu_devs / sizeof algor_cpu_devs[0];
+
+int
+algormatch(parent, cfdata, aux)
+ struct device *parent;
+ void *cfdata;
+ void *aux;
+{
+ struct cfdata *cf = cfdata;
+ struct confargs *ca = aux;
+
+ /* Make sure that we're looking for a ALGORITHMICS BUS */
+ if (strcmp(ca->ca_name, algor_cd.cd_name) != 0)
+ return (0);
+
+ /* Make sure that unit exists. */
+ if (cf->cf_unit != 0 ||
+ cputype > nalgor_cpu_devs || algor_cpu_devs[cputype] == NULL)
+ return (0);
+
+ return (1);
+}
+
+void
+algorattach(parent, self, aux)
+ struct device *parent;
+ struct device *self;
+ void *aux;
+{
+ struct algor_softc *sc = (struct algor_softc *)self;
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