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[src/trunk]: src/sys/arch/vax/vax Rudimentary CPU support files for VAX 4000/...



details:   https://anonhg.NetBSD.org/src/rev/a6caeb1ed9d9
branches:  trunk
changeset: 485906:a6caeb1ed9d9
user:      ragge <ragge%NetBSD.org@localhost>
date:      Mon May 08 18:45:26 2000 +0000

description:
Rudimentary CPU support files for VAX 4000/105, 4000/200 and 4000/500.
>From Michael Kukat.

diffstat:

 sys/arch/vax/vax/ka53.c  |  234 +++++++++++++++++++++++++++++++++++++++++++++++
 sys/arch/vax/vax/ka660.c |  151 ++++++++++++++++++++++++++++++
 sys/arch/vax/vax/ka680.c |  231 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 616 insertions(+), 0 deletions(-)

diffs (truncated from 628 to 300 lines):

diff -r a82a5897c024 -r a6caeb1ed9d9 sys/arch/vax/vax/ka53.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/vax/vax/ka53.c   Mon May 08 18:45:26 2000 +0000
@@ -0,0 +1,234 @@
+/*     $NetBSD: ka53.c,v 1.1 2000/05/08 18:45:26 ragge Exp $   */
+/*
+ * Copyright (c) 2000 Ludd, University of Lule}, Sweden.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed at Ludd, University of 
+ *     Lule}, Sweden and its contributors.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+
+#include <machine/clock.h>
+#include <machine/cpu.h>
+#include <machine/scb.h>
+#include <machine/sid.h>
+#include <machine/mtpr.h>
+
+static void    ka53_conf(void);
+static void    ka53_memerr(void);
+static int     ka53_mchk(caddr_t);
+static void    ka53_halt(void);
+static void    ka53_reboot(int);
+#ifdef notyet
+static void    ka53_softmem(int);
+static void    ka53_hardmem(int);
+static void    ka53_steal_pages(void);
+static void    ka53_cache_enable(void);
+#endif
+static void    ka53_halt(void);
+
+/* 
+ * Declaration of 680-specific calls.
+ */
+struct cpu_dep ka53_calls = {
+       0, /*ka53_steal_pages,*/
+       ka53_mchk,
+       ka53_memerr, 
+       ka53_conf,
+       generic_clkread,
+       generic_clkwrite,
+       32,      /* ~VUPS */
+       2,      /* SCB pages */
+       ka53_halt,
+       ka53_reboot,
+};
+
+
+void
+ka53_conf()
+{
+       printf("cpu0: KA53, ucode rev %d\n", vax_cpudata & 0xff);
+}
+
+/*
+ * Why may we get memory errors during startup???
+ */
+/*
+void
+ka53_hardmem(int arg)
+{
+       if (cold == 0)
+               printf("Hard memory error\n");
+       splhigh();
+}
+
+void
+ka53_softmem(int arg)
+{
+       if (cold == 0)
+               printf("Soft memory error\n");
+       splhigh();
+}
+*/
+
+/*
+ * KA53-specific IPRs. KA53 has the funny habit to control all caches
+ * via IPRs.
+ */
+#define PR_CCTL         0xa0
+#define CCTL_ENABLE    0x00000001
+#define CCTL_SW_ETM    0x40000000
+#define CCTL_HW_ETM    0x80000000
+
+#define PR_BCETSTS     0xa3
+#define PR_BCEDSTS     0xa6
+#define PR_NESTS       0xae
+
+#define PR_VMAR         0xd0
+#define PR_VTAG         0xd1
+#define PR_ICSR         0xd3
+#define ICSR_ENABLE    0x01
+
+#define PR_PCCTL       0xf8
+#define PCCTL_P_EN     0x10
+#define PCCTL_I_EN     0x02
+#define PCCTL_D_EN     0x01
+
+#if 0
+void
+ka53_cache_enable()
+{
+       int start, slut;
+
+       return;
+
+       /*
+        * Turn caches off.
+        */
+       mtpr(0, PR_ICSR);
+       mtpr(0, PR_PCCTL);
+       mtpr(mfpr(PR_CCTL) | CCTL_SW_ETM, PR_CCTL);
+
+       /*
+        * Invalidate caches.
+        */
+       mtpr(mfpr(PR_CCTL) | 6, PR_CCTL);       /* Set cache size and speed */
+       mtpr(mfpr(PR_BCETSTS), PR_BCETSTS);     /* Clear error bits */
+       mtpr(mfpr(PR_BCEDSTS), PR_BCEDSTS);     /* Clear error bits */
+       mtpr(mfpr(PR_NESTS), PR_NESTS);  /* Clear error bits */
+
+
+       start = 0x01400000;
+       slut  = 0x01420000;
+
+       /* Flush cache lines */
+       for (; start < slut; start += 0x20)
+               mtpr(0, start);
+
+       mtpr((mfpr(PR_CCTL) & ~(CCTL_SW_ETM|CCTL_ENABLE)) | CCTL_HW_ETM,
+           PR_CCTL);
+
+       start = 0x01000000;
+       slut  = 0x01020000;
+
+       /* clear tag and valid */
+       for (; start < slut; start += 0x20)
+               mtpr(0, start);
+
+       mtpr(mfpr(PR_CCTL) | 6 | CCTL_ENABLE, PR_CCTL); /* enab. bcache */
+
+       start = 0x01800000;
+       slut  = 0x01802000;
+
+       /* Clear primary cache */
+       for (; start < slut; start += 0x20)
+               mtpr(0, start);
+
+       /* Flush the pipes (via REI) */
+       asm("movpsl -(sp); movab 1f,-(sp); rei; 1:;");
+
+       /* Enable primary cache */
+       mtpr(PCCTL_P_EN|PCCTL_I_EN|PCCTL_D_EN, PR_PCCTL);
+
+       /* Enable the VIC */
+       start = 0;
+       slut  = 0x800;
+       for (; start < slut; start += 0x20) {
+               mtpr(start, PR_VMAR);
+               mtpr(0, PR_VTAG);
+       }
+       mtpr(ICSR_ENABLE, PR_ICSR);
+}
+#endif
+
+void
+ka53_memerr()
+{
+       printf("Memory err!\n");
+}
+
+int
+ka53_mchk(caddr_t addr)
+{
+       mtpr(0x00, PR_MCESR);
+       printf("Machine Check\n");
+       return 0;
+}
+
+#if 0
+void
+ka53_steal_pages()
+{
+
+       /*
+        * Get the soft and hard memory error vectors now.
+        */
+
+       scb_vecalloc(0x54, ka53_softmem, 0, 0);
+       scb_vecalloc(0x60, ka53_hardmem, 0, 0);
+
+
+       /* Turn on caches (to speed up execution a bit) */
+       ka53_cache_enable();
+}
+#endif
+
+static void
+ka53_halt()
+{
+       asm("halt");
+}
+
+static void
+ka53_reboot(int arg)
+{
+       asm("halt");
+}
+
diff -r a82a5897c024 -r a6caeb1ed9d9 sys/arch/vax/vax/ka660.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/vax/vax/ka660.c  Mon May 08 18:45:26 2000 +0000
@@ -0,0 +1,151 @@
+/*     $NetBSD: ka660.c,v 1.1 2000/05/08 18:45:27 ragge Exp $  */
+/*
+ * Copyright (c) 2000 Ludd, University of Lule}, Sweden.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed at Ludd, University of 
+ *     Lule}, Sweden and its contributors.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/types.h>
+#include <sys/device.h>
+#include <sys/kernel.h>
+#include <sys/systm.h>
+
+#include <vm/vm.h>
+#include <vm/vm_kern.h>
+
+#include <machine/pte.h>
+#include <machine/cpu.h>
+#include <machine/mtpr.h>
+#include <machine/sid.h>
+#include <machine/pmap.h>
+#include <machine/nexus.h>
+#include <machine/uvax.h>
+#include <machine/ka410.h>
+#include <machine/ka420.h>
+#include <machine/clock.h>
+#include <machine/vsbus.h>
+
+#define KA660_CCR      37      /* Cache Control Register */
+#define KA660_CTAG     0x20150000      /* Cache Tags */
+#define KA660_CDATA    0x20150400      /* Cache Data */
+#define KA660_BEHR     0x20150800      /* Bank Enable/Hit Register */
+#define CCR_WWP 8      /* Write Wrong Parity */



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