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[src/trunk]: src/sys/arch/sparc/dev Conversion to bus_space*().
details: https://anonhg.NetBSD.org/src/rev/f20f6851a583
branches: trunk
changeset: 488115:f20f6851a583
user: pk <pk%NetBSD.org@localhost>
date: Sun Jun 18 19:19:53 2000 +0000
description:
Conversion to bus_space*().
diffstat:
sys/arch/sparc/dev/si.c | 361 ++++++++++++++++++++++++++------------------
sys/arch/sparc/dev/sireg.h | 120 +++++++-------
2 files changed, 269 insertions(+), 212 deletions(-)
diffs (truncated from 910 to 300 lines):
diff -r 0e4b90833db6 -r f20f6851a583 sys/arch/sparc/dev/si.c
--- a/sys/arch/sparc/dev/si.c Sun Jun 18 18:29:04 2000 +0000
+++ b/sys/arch/sparc/dev/si.c Sun Jun 18 19:19:53 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: si.c,v 1.59 2000/06/15 14:42:32 pk Exp $ */
+/* $NetBSD: si.c,v 1.60 2000/06/18 19:19:53 pk Exp $ */
/*-
* Copyright (c) 1996 The NetBSD Foundation, Inc.
@@ -178,7 +178,6 @@
struct ncr5380_softc ncr_sc;
bus_space_tag_t sc_bustag; /* bus tags */
bus_dma_tag_t sc_dmatag;
- volatile struct si_regs *sc_regs;
int sc_adapter_type;
#define BOARD_ID_SI 0
#define BOARD_ID_SW 1
@@ -244,6 +243,16 @@
void si_obio_intr_on __P((struct ncr5380_softc *));
void si_obio_intr_off __P((struct ncr5380_softc *));
+/* Shorthand bus space access */
+#define SIREG_READ(sc, index) \
+ bus_space_read_2((sc)->sc_regt, (sc)->sc_regh, index)
+#define SIREG_WRITE(sc, index, v) \
+ bus_space_write_2((sc)->sc_regt, (sc)->sc_regh, index, v)
+#define SWREG_READ(sc, index) \
+ bus_space_read_4((sc)->sc_regt, (sc)->sc_regh, index)
+#define SWREG_WRITE(sc, index, v) \
+ bus_space_write_4((sc)->sc_regt, (sc)->sc_regh, index, v)
+
/* The Sun SCSI-3 VME controller. */
struct cfattach si_ca = {
@@ -331,11 +340,12 @@
mod = 0x3d; /* VME_AM_A24 | VME_AM_MBO | VME_AM_SUPER | VME_AM_DATA */
- if (vme_space_map(ct, va->r[0].offset, sizeof(struct si_regs),
+ if (vme_space_map(ct, va->r[0].offset, SIREG_BANK_SZ,
mod, VME_D8, 0, &bt, &bh, &resc) != 0)
panic("%s: vme_space_map", ncr_sc->sc_dev.dv_xname);
- sc->sc_regs = (struct si_regs *)bh; /* XXX */
+ ncr_sc->sc_regt = bt;
+ ncr_sc->sc_regh = bh;
sc->sc_options = si_options;
sc->sc_adapter_type = BOARD_ID_SI;
@@ -381,13 +391,15 @@
/* Map the controller registers. */
if (obio_bus_map(oba->oba_bustag, oba->oba_paddr,
0,
- sizeof(struct si_regs),
+ SWREG_BANK_SZ,
BUS_SPACE_MAP_LINEAR,
0, &bh) != 0) {
printf("%s: cannot map registers\n", self->dv_xname);
return;
}
- sc->sc_regs = (struct si_regs *)bh;
+
+ ncr_sc->sc_regt = oba->oba_bustag;
+ ncr_sc->sc_regh = bh;
sc->sc_options = sw_options;
sc->sc_adapter_type = BOARD_ID_SW;
@@ -423,7 +435,6 @@
struct si_softc *sc;
{
struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc;
- volatile struct si_regs *regs;
char bits[64];
int i;
@@ -435,19 +446,19 @@
sc->sc_options =
(ncr_sc->sc_dev.dv_cfdata->cf_flags & SI_OPTIONS_MASK);
- regs = sc->sc_regs;
-
/*
* Initialize fields used by the MI code
*/
- ncr_sc->sci_r0 = ®s->sci.sci_r0;
- ncr_sc->sci_r1 = ®s->sci.sci_r1;
- ncr_sc->sci_r2 = ®s->sci.sci_r2;
- ncr_sc->sci_r3 = ®s->sci.sci_r3;
- ncr_sc->sci_r4 = ®s->sci.sci_r4;
- ncr_sc->sci_r5 = ®s->sci.sci_r5;
- ncr_sc->sci_r6 = ®s->sci.sci_r6;
- ncr_sc->sci_r7 = ®s->sci.sci_r7;
+
+ /* NCR5380 register bank offsets */
+ ncr_sc->sci_r0 = 0;
+ ncr_sc->sci_r1 = 1;
+ ncr_sc->sci_r2 = 2;
+ ncr_sc->sci_r3 = 3;
+ ncr_sc->sci_r4 = 4;
+ ncr_sc->sci_r5 = 5;
+ ncr_sc->sci_r6 = 6;
+ ncr_sc->sci_r7 = 7;
ncr_sc->sc_rev = NCR_VARIANT_NCR5380;
@@ -499,8 +510,6 @@
bits, sizeof(bits)));
}
#ifdef DEBUG
- if (si_debug)
- printf("si: Set TheSoftC=%p TheRegs=%p\n", sc, regs);
ncr_sc->sc_link.flags |= si_link_flags;
#endif
@@ -536,7 +545,7 @@
si_intr(void *arg)
{
struct si_softc *sc = arg;
- volatile struct si_regs *si = sc->sc_regs;
+ struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)arg;
int dma_error, claimed;
u_short csr;
@@ -545,9 +554,10 @@
/* SBC interrupt? DMA interrupt? */
if (sc->sc_adapter_type == BOARD_ID_SW)
- csr = si->sw_csr;
+ csr = SWREG_READ(ncr_sc, SWREG_CSR);
else
- csr = si->si_csr;
+ csr = SIREG_READ(ncr_sc, SIREG_CSR);
+
NCR_TRACE("si_intr: csr=0x%x\n", csr);
if (csr & SI_CSR_DMA_CONFLICT) {
@@ -585,7 +595,6 @@
si_reset_adapter(struct ncr5380_softc *ncr_sc)
{
struct si_softc *sc = (struct si_softc *)ncr_sc;
- volatile struct si_regs *si = sc->sc_regs;
#ifdef DEBUG
if (si_debug) {
@@ -599,17 +608,19 @@
*
* The reset bits in the CSR are active low.
*/
- si->si_csr = 0;
+ SIREG_WRITE(ncr_sc, SIREG_CSR, 0);
delay(10);
- si->si_csr = SI_CSR_FIFO_RES | SI_CSR_SCSI_RES | SI_CSR_INTR_EN;
+ SIREG_WRITE(ncr_sc, SIREG_CSR,
+ SI_CSR_FIFO_RES | SI_CSR_SCSI_RES | SI_CSR_INTR_EN);
delay(10);
- si->fifo_count = 0;
- si->dma_addrh = 0;
- si->dma_addrl = 0;
- si->dma_counth = 0;
- si->dma_countl = 0;
- si->si_iv_am = sc->sc_adapter_iv_am;
- si->fifo_cnt_hi = 0;
+
+ SIREG_WRITE(ncr_sc, SIREG_FIFO_CNT, 0);
+ SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRH, 0);
+ SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRL, 0);
+ SIREG_WRITE(ncr_sc, SIREG_DMA_CNTH, 0);
+ SIREG_WRITE(ncr_sc, SIREG_DMA_CNTL, 0);
+ SIREG_WRITE(ncr_sc, SIREG_IV_AM, sc->sc_adapter_iv_am);
+ SIREG_WRITE(ncr_sc, SIREG_FIFO_CNTH, 0);
SCI_CLR_INTR(ncr_sc);
}
@@ -617,8 +628,6 @@
static void
sw_reset_adapter(struct ncr5380_softc *ncr_sc)
{
- struct si_softc *sc = (struct si_softc *)ncr_sc;
- volatile struct si_regs *si = sc->sc_regs;
#ifdef DEBUG
if (si_debug) {
@@ -629,13 +638,14 @@
/*
* The reset bits in the CSR are active low.
*/
- si->sw_csr = 0;
+ SWREG_WRITE(ncr_sc, SWREG_CSR, 0);
delay(10);
- si->sw_csr = SI_CSR_SCSI_RES;
- si->dma_addr = 0;
- si->dma_count = 0;
+ SWREG_WRITE(ncr_sc, SWREG_CSR, SI_CSR_SCSI_RES);
+
+ SWREG_WRITE(ncr_sc, SWREG_DMA_ADDR, 0);
+ SWREG_WRITE(ncr_sc, SWREG_DMA_CNT, 0);
delay(10);
- si->sw_csr |= SI_CSR_INTR_EN;
+ SWREG_WRITE(ncr_sc, SWREG_CSR, SI_CSR_SCSI_RES | SI_CSR_INTR_EN);
SCI_CLR_INTR(ncr_sc);
}
@@ -771,7 +781,6 @@
{
struct si_softc *sc = (struct si_softc *)ncr_sc;
struct sci_req *sr = ncr_sc->sc_current;
- volatile struct si_regs *si = sc->sc_regs;
int tmo, csr_mask, csr;
/* Make sure DMA started successfully. */
@@ -784,9 +793,9 @@
tmo = 50000; /* X100 = 5 sec. */
for (;;) {
if (sc->sc_adapter_type == BOARD_ID_SW)
- csr = si->sw_csr;
+ csr = SWREG_READ(ncr_sc, SWREG_CSR);
else
- csr = si->si_csr;
+ csr = SIREG_READ(ncr_sc, SIREG_CSR);
if (csr & csr_mask)
break;
if (--tmo <= 0) {
@@ -823,11 +832,12 @@
si_vme_intr_on(ncr_sc)
struct ncr5380_softc *ncr_sc;
{
- struct si_softc *sc = (struct si_softc *)ncr_sc;
- volatile struct si_regs *si = sc->sc_regs;
+ u_int16_t csr;
si_vme_dma_setup(ncr_sc);
- si->si_csr |= SI_CSR_DMA_EN;
+ csr = SIREG_READ(ncr_sc, SIREG_CSR);
+ csr |= SI_CSR_DMA_EN;
+ SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
}
/*
@@ -838,10 +848,11 @@
si_vme_intr_off(ncr_sc)
struct ncr5380_softc *ncr_sc;
{
- struct si_softc *sc = (struct si_softc *)ncr_sc;
- volatile struct si_regs *si = sc->sc_regs;
+ u_int16_t csr;
- si->si_csr &= ~SI_CSR_DMA_EN;
+ csr = SIREG_READ(ncr_sc, SIREG_CSR);
+ csr &= ~SI_CSR_DMA_EN;
+ SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
}
/*
@@ -860,27 +871,32 @@
si_vme_dma_setup(ncr_sc)
struct ncr5380_softc *ncr_sc;
{
- struct si_softc *sc = (struct si_softc *)ncr_sc;
- volatile struct si_regs *si = sc->sc_regs;
+ u_int16_t csr;
+
+ csr = SIREG_READ(ncr_sc, SIREG_CSR);
/* Reset the FIFO */
- si->si_csr &= ~SI_CSR_FIFO_RES; /* active low */
- si->si_csr |= SI_CSR_FIFO_RES;
+ csr &= ~SI_CSR_FIFO_RES; /* active low */
+ SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
+ csr |= SI_CSR_FIFO_RES;
+ SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
/* Set direction (assume recv here) */
- si->si_csr &= ~SI_CSR_SEND;
+ csr &= ~SI_CSR_SEND;
+ SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
/* Assume worst alignment */
- si->si_csr |= SI_CSR_BPCON;
+ csr |= SI_CSR_BPCON;
+ SIREG_WRITE(ncr_sc, SIREG_CSR, csr);
- si->dma_addrh = 0;
- si->dma_addrl = 0;
+ SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRH, 0);
+ SIREG_WRITE(ncr_sc, SIREG_DMA_ADDRL, 0);
- si->dma_counth = 0;
- si->dma_countl = 0;
+ SIREG_WRITE(ncr_sc, SIREG_DMA_CNTH, 0);
+ SIREG_WRITE(ncr_sc, SIREG_DMA_CNTL, 0);
/* Clear FIFO counter. (also hits dma_count) */
- si->fifo_cnt_hi = 0;
- si->fifo_count = 0;
+ SIREG_WRITE(ncr_sc, SIREG_FIFO_CNTH, 0);
+ SIREG_WRITE(ncr_sc, SIREG_FIFO_CNT, 0);
}
@@ -891,9 +907,10 @@
struct si_softc *sc = (struct si_softc *)ncr_sc;
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