[src/trunk]: src/sys/dev/ic Catch some potentially infinite loops in while() ...

[jhawk <jhawk%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f4a4517ada28
branches:  trunk
changeset: 486052:f4a4517ada28
user:      jhawk <jhawk%NetBSD.org@localhost>
date:      Fri May 12 03:35:57 2000 +0000

description:
Catch some potentially infinite loops in while() loops if the chip happens
to "go insane" and never complete some operations (dmasync, etc.).

diffstat:

 sys/dev/ic/i82557.c |  33 ++++++++++++++++++++++++++-------
 1 files changed, 26 insertions(+), 7 deletions(-)

diffs (86 lines):

diff -r 184e196db00d -r f4a4517ada28 sys/dev/ic/i82557.c
--- a/sys/dev/ic/i82557.c       Fri May 12 03:35:34 2000 +0000
+++ b/sys/dev/ic/i82557.c       Fri May 12 03:35:57 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: i82557.c,v 1.25 2000/03/30 02:06:17 simonb Exp $       */
+/*     $NetBSD: i82557.c,v 1.26 2000/05/12 03:35:57 jhawk Exp $        */
 
 /*-
  * Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
@@ -1370,10 +1370,15 @@
        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->sc_cddma + FXP_CDCONFIGOFF);
        CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
        /* ...and wait for it to complete. */
+       i = 10000;
        do {
                FXP_CDCONFIGSYNC(sc,
                    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
-       } while ((cbp->cb_status & FXP_CB_STATUS_C) == 0);
+       } while ((cbp->cb_status & FXP_CB_STATUS_C) == 0 && --i);
+       if (i == 0) {
+               printf("%s: dmasync timeout\n", sc->sc_dev.dv_xname);
+               return ETIMEDOUT;
+       }
 
        /*
         * Initialize the station address.
@@ -1395,11 +1400,15 @@
        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->sc_cddma + FXP_CDIASOFF);
        CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
        /* ...and wait for it to complete. */
+       i = 10000;
        do {
                FXP_CDIASSYNC(sc,
                    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
-       } while ((cb_ias->cb_status & FXP_CB_STATUS_C) == 0);
-
+       } while ((cb_ias->cb_status & FXP_CB_STATUS_C) == 0 && --i);
+       if (i == 0) {
+               printf("%s: dmasync timeout\n", sc->sc_dev.dv_xname);
+               return ETIMEDOUT;
+       }
        /*
         * Initialize the transmit descriptor ring.  txlast is initialized
         * to the end of the list so that it will wrap around to the first
@@ -1780,7 +1789,7 @@
        struct ethercom *ec = &sc->sc_ethercom;
        struct ether_multi *enm;
        struct ether_multistep step;
-       int nmcasts;
+       int count, nmcasts;
 
 #ifdef DIAGNOSTIC
        if (sc->sc_txpending)
@@ -1833,9 +1842,14 @@
         * Wait until the command unit is not active.  This should never
         * happen since nothing is queued, but make sure anyway.
         */
+       count = 10000;
        while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) ==
-           FXP_SCB_CUS_ACTIVE)
+           FXP_SCB_CUS_ACTIVE && --count)
                /* nothing */ ;
+       if (count == 0) {
+               printf("%s: command queue timeout\n", sc->sc_dev.dv_xname);
+               return;
+       }
 
        /*
         * Start the multicast setup command/DMA.
@@ -1845,10 +1859,15 @@
        CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
 
        /* ...and wait for it to complete. */
+       count = 10000;
        do {
                FXP_CDMCSSYNC(sc,
                    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
-       } while ((mcsp->cb_status & FXP_CB_STATUS_C) == 0);
+       } while ((mcsp->cb_status & FXP_CB_STATUS_C) == 0 && --count);
+       if (count == 0) {
+               printf("%s: dmasync timeout\n", sc->sc_dev.dv_xname);
+               return;
+       }
 }
 
 int