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[src/trunk]: src/sys/dev/qbus Add function uba_reset_establish() to register ...
details: https://anonhg.NetBSD.org/src/rev/3a5352287d81
branches: trunk
changeset: 485521:3a5352287d81
user: ragge <ragge%NetBSD.org@localhost>
date: Sun Apr 30 11:46:03 2000 +0000
description:
Add function uba_reset_establish() to register reset functions like
uba_intr_establish(). Basic framework for resource (BDP) allocation,
not yet finished.
diffstat:
sys/dev/qbus/uba.c | 55 +++++-----
sys/dev/qbus/ubareg.h | 248 +++++--------------------------------------------
sys/dev/qbus/ubavar.h | 33 +++---
3 files changed, 74 insertions(+), 262 deletions(-)
diffs (truncated from 448 to 300 lines):
diff -r 960c90062497 -r 3a5352287d81 sys/dev/qbus/uba.c
--- a/sys/dev/qbus/uba.c Sun Apr 30 11:43:26 2000 +0000
+++ b/sys/dev/qbus/uba.c Sun Apr 30 11:46:03 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: uba.c,v 1.50 2000/03/30 12:45:39 augustss Exp $ */
+/* $NetBSD: uba.c,v 1.51 2000/04/30 11:46:03 ragge Exp $ */
/*
* Copyright (c) 1996 Jonathan Stone.
* Copyright (c) 1994, 1996 Ludd, University of Lule}, Sweden.
@@ -58,6 +58,7 @@
#include <machine/scb.h>
#include <machine/cpu.h>
+#include <dev/qbus/ubareg.h>
#include <dev/qbus/ubavar.h>
#include "ioconf.h"
@@ -107,24 +108,44 @@
}
/*
+ * Each device that needs some handling if an ubareset occurs must
+ * register for reset first through this routine.
+ */
+void
+uba_reset_establish(void (*reset)(struct device *), struct device *dev)
+{
+ struct uba_softc *uh = (void *)dev->dv_parent;
+ struct uba_reset *ur;
+
+ ur = malloc(sizeof(struct uba_reset), M_DEVBUF, M_NOWAIT);
+ ur->ur_dev = dev;
+ ur->ur_reset = reset;
+
+ SIMPLEQ_INSERT_TAIL(&uh->uh_resetq, ur, ur_resetq);
+}
+
+/*
* Generate a reset on uba number uban. Then
* call each device that asked to be called during attach,
* giving it a chance to clean up so as to be able to continue.
*/
void
-ubareset(uban)
- int uban;
+ubareset(struct uba_softc *uh)
{
- struct uba_softc *uh = uba_cd.cd_devs[uban];
- int s, i;
+ struct uba_reset *ur;
+ int s;
s = splimp();
SIMPLEQ_INIT(&uh->uh_resq);
printf("%s: reset", uh->uh_dev.dv_xname);
(*uh->uh_ubainit)(uh);
- for (i = 0; i < uh->uh_resno; i++)
- (*uh->uh_reset[i])(uh->uh_resarg[i]);
+ ur = SIMPLEQ_FIRST(&uh->uh_resetq);
+ if (ur) do {
+ printf(" %s", ur->ur_dev->dv_xname);
+ (*ur->ur_reset)(ur->ur_dev);
+ } while ((ur = SIMPLEQ_NEXT(ur, ur_resetq)));
+
printf("\n");
splx(s);
}
@@ -146,6 +167,7 @@
*/
sc->uh_lastiv = 0x200;
SIMPLEQ_INIT(&sc->uh_resq);
+ SIMPLEQ_INIT(&sc->uh_resetq);
/*
* Allocate place for unibus I/O space in virtual space.
@@ -177,7 +199,6 @@
ua.ua_ioh = ubdevreg(cf->cf_loc[0]) + sc->uh_ioh;
ua.ua_iot = sc->uh_iot;
ua.ua_dmat = sc->uh_dmat;
- ua.ua_reset = NULL;
if (badaddr((caddr_t)ua.ua_ioh, 2) ||
(sc->uh_errchk ? (*sc->uh_errchk)(sc):0))
@@ -197,24 +218,6 @@
goto fail;
if (vec == 0)
goto fail;
-
- if (ua.ua_reset) { /* device wants ubareset */
- if (sc->uh_resno == 0) {
-#define RESETSIXE 128
- sc->uh_reset = malloc(sizeof(void *) * RESETSIXE,
- M_DEVBUF, M_NOWAIT);
- sc->uh_resarg = malloc(sizeof(void *) * RESETSIXE,
- M_DEVBUF, M_NOWAIT);
- }
- if (sc->uh_resno < RESETSIXE) {
- sc->uh_resarg[sc->uh_resno] = cf->cf_unit;
- sc->uh_reset[sc->uh_resno++] = ua.ua_reset;
- } else {
- printf("%s: Expand reset table, skipping reset %s%d\n",
- sc->uh_dev.dv_xname, cf->cf_driver->cd_name,
- cf->cf_unit);
- }
- }
ua.ua_br = br;
ua.ua_cvec = vec;
diff -r 960c90062497 -r 3a5352287d81 sys/dev/qbus/ubareg.h
--- a/sys/dev/qbus/ubareg.h Sun Apr 30 11:43:26 2000 +0000
+++ b/sys/dev/qbus/ubareg.h Sun Apr 30 11:46:03 2000 +0000
@@ -1,13 +1,7 @@
-/* $NetBSD: ubareg.h,v 1.15 2000/02/13 13:01:14 ragge Exp $ */
+/* $NetBSD: ubareg.h,v 1.16 2000/04/30 11:46:03 ragge Exp $ */
-/*-
- * Copyright (c) 1982, 1986 The Regents of the University of California.
- * All rights reserved.
- * (c) UNIX System Laboratories, Inc.
- * All or some portions of this file are derived from material licensed
- * to the University of California by American Telephone and Telegraph
- * Co. or Unix System Laboratories, Inc. and are reproduced herein with
- * the permission of UNIX System Laboratories, Inc.
+/*
+ * Copyright (c) 2000 Ludd, University of Lule}, Sweden. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -19,223 +13,35 @@
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * This product includes software developed at Ludd, University of
+ * Lule}, Sweden and its contributors.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
*
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)ubareg.h 7.8 (Berkeley) 5/9/91
- */
-
-/*
- * VAX UNIBUS adapter registers
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
- * "UNIBUS" adaptor types.
- * This code is used for both UNIBUSes and Q-buses
- * with different types of adaptors.
- * Definition of a type includes support code for that type.
- */
-
-#if VAX780 || VAX8600
-#define DW780 1 /* has adaptor regs, sr: 780/785/8600 */
-#else
-#undef DW780
-#endif
-
-
-#if VAX750
-#define DW750 2 /* has adaptor regs, no sr: 750, 730 */
-#endif
-
-#if VAX730
-#define DW730 3 /* has adaptor regs, no sr: 750, 730 */
-#endif
-
-#if VAX630 || VAX650
-#define QBA 4 /* 22-bit Q-bus, no adaptor regs: uVAX II */
-#endif
-
-/*
- * Size of unibus memory address space in pages
- * (also number of map registers).
- * QBAPAGES should be 8192, but we don't need nearly that much
- * address space, and the return from the allocation routine
- * can accommodate at most 2047 (ubavar.h: UBA_MAXMR);
- * QBAPAGES must be at least UBAPAGES. Choose pragmatically.
- *
- * Is there ever any need to have QBAPAGES != UBAPAGES???
- * Wont work now anyway, QBAPAGES _must_ be .eq. UBAPAGES.
+ * UNIBUS/Qbus map table definitions. Not unlike VAX page tables.
+ * This type of map table is used in more devices than Unibus devices.
*/
-#define UBAPAGES 496
-#define NUBMREG 496
-#define QBAPAGES 1024
-#define UBAIOADDR 0760000 /* start of I/O page */
-#define UBAIOPAGES 16
-#define UBAIOSIZE 8192 /* 8K I/O space */
-
-#ifndef _LOCORE
-#if 0
-/*
- * DW780/DW750 hardware registers
- */
-struct uba_regs {
- int uba_cnfgr; /* configuration register */
- int uba_cr; /* control register */
- int uba_sr; /* status register */
- int uba_dcr; /* diagnostic control register */
- int uba_fmer; /* failed map entry register */
- int uba_fubar; /* failed UNIBUS address register */
- int pad1[2];
- int uba_brsvr[4];
- int uba_brrvr[4]; /* receive vector registers */
- int uba_dpr[16]; /* buffered data path register */
- int pad2[480];
- struct pte uba_map[UBAPAGES]; /* unibus map register */
- int pad3[UBAIOPAGES]; /* no maps for device address space */
-};
-#endif
-#endif
-
-#ifdef DW780
-/* uba_cnfgr */
-#define UBACNFGR_UBINIT 0x00040000 /* unibus init asserted */
-#define UBACNFGR_UBPDN 0x00020000 /* unibus power down */
-#define UBACNFGR_UBIC 0x00010000 /* unibus init complete */
-
-#define UBACNFGR_BITS \
-"\40\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT\30ADPDN\27ADPUP\23UBINIT\22UBPDN\21UBIC"
-
-/* uba_cr */
-#define UBACR_MRD16 0x40000000 /* map reg disable bit 4 */
-#define UBACR_MRD8 0x20000000 /* map reg disable bit 3 */
-#define UBACR_MRD4 0x10000000 /* map reg disable bit 2 */
-#define UBACR_MRD2 0x08000000 /* map reg disable bit 1 */
-#define UBACR_MRD1 0x04000000 /* map reg disable bit 0 */
-#define UBACR_IFS 0x00000040 /* interrupt field switch */
-#define UBACR_BRIE 0x00000020 /* BR interrupt enable */
-#define UBACR_USEFIE 0x00000010 /* UNIBUS to SBI error field IE */
-#define UBACR_SUEFIE 0x00000008 /* SBI to UNIBUS error field IE */
-#define UBACR_CNFIE 0x00000004 /* configuration IE */
-#define UBACR_UPF 0x00000002 /* UNIBUS power fail */
-#define UBACR_ADINIT 0x00000001 /* adapter init */
+#define UBA_V 0x80000000 /* PTE entry is valid */
+#define UBA_BDPMASK 0x01e00000 /* BDP entries */
+#define UBA_BDPSHIFT 21
+#define UBA_PFN 0x001fffff /* PFN map */
-/* uba_sr */
-#define UBASR_BR7FULL 0x08000000 /* BR7 receive vector reg full */
-#define UBASR_BR6FULL 0x04000000 /* BR6 receive vector reg full */
-#define UBASR_BR5FULL 0x02000000 /* BR5 receive vector reg full */
-#define UBASR_BR4FULL 0x01000000 /* BR4 receive vector reg full */
-#define UBASR_RDTO 0x00000400 /* UNIBUS to SBI read data timeout */
-#define UBASR_RDS 0x00000200 /* read data substitute */
-#define UBASR_CRD 0x00000100 /* corrected read data */
-#define UBASR_CXTER 0x00000080 /* command transmit error */
-#define UBASR_CXTMO 0x00000040 /* command transmit timeout */
-#define UBASR_DPPE 0x00000020 /* data path parity error */
-#define UBASR_IVMR 0x00000010 /* invalid map register */
-#define UBASR_MRPF 0x00000008 /* map register parity failure */
-#define UBASR_LEB 0x00000004 /* lost error */
-#define UBASR_UBSTO 0x00000002 /* UNIBUS select timeout */
-#define UBASR_UBSSYNTO 0x00000001 /* UNIBUS slave sync timeout */
-
-#define UBASR_BITS \
-"\20\13RDTO\12RDS\11CRD\10CXTER\7CXTMO\6DPPE\5IVMR\4MRPF\3LEB\2UBSTO\1UBSSYNTO"
-
-/* uba_brrvr[] */
-#define UBABRRVR_AIRI 0x80000000 /* adapter interrupt request */
-#define UBABRRVR_DIV 0x0000ffff /* device interrupt vector field */
-#endif
-
-/* uba_dpr */
-#ifdef DW780
-#define UBADPR_BNE 0x80000000 /* buffer not empty - purge */
-#define UBADPR_BTE 0x40000000 /* buffer transfer error */
-#define UBADPR_DPF 0x20000000 /* DP function (RO) */
-#define UBADPR_BS 0x007f0000 /* buffer state field */
-#define UBADPR_BUBA 0x0000ffff /* buffered UNIBUS address */
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