[src/netbsd-1-5]: src/sys/arch/news68k/include Pull up revision 1.7 (requeste...

[jhawk <jhawk%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/df4a44ec4b76
branches:  netbsd-1-5
changeset: 490416:df4a44ec4b76
user:      jhawk <jhawk%NetBSD.org@localhost>
date:      Sun Dec 24 07:18:24 2000 +0000

description:
Pull up revision 1.7 (requested by tsutsui):
  Allow runtime enabling/disabling of DC_BE and IC_BE bits in %cacr
  and enable them on news1200/1400/1500 (Which have no L2 cache); yields
  a performance improvement. Also correct a typo in a comment.

diffstat:

 sys/arch/news68k/include/cpu.h |  7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diffs (28 lines):

diff -r 50f7b4950187 -r df4a44ec4b76 sys/arch/news68k/include/cpu.h
--- a/sys/arch/news68k/include/cpu.h    Sun Dec 24 06:36:44 2000 +0000
+++ b/sys/arch/news68k/include/cpu.h    Sun Dec 24 07:18:24 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.h,v 1.4 2000/05/26 21:20:00 thorpej Exp $  */
+/*     $NetBSD: cpu.h,v 1.4.4.1 2000/12/24 07:18:24 jhawk Exp $        */
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -72,6 +72,9 @@
 #define IC_CLEAR       (DC_WA|DC_ENABLE|IC_CLR|IC_ENABLE)
 #define DC_CLEAR       (DC_WA|DC_CLR|DC_ENABLE|IC_ENABLE)
 
+#define DCIC_CLR       (DC_CLR|IC_CLR)
+#define CACHE_BE       (DC_BE|IC_BE)
+
 #endif
 
 /*
@@ -183,7 +186,7 @@
 #define NEWS1200       1
 
 extern int cpuspeed;
-extern char *intiobase, *intiolimit;
+extern char *intiobase, *intiolimit, *extiobase;
 extern u_int intiobase_phys, intiotop_phys;
 extern u_int extiobase_phys, extiotop_phys;
 extern u_int intrcnt[];