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[src/trunk]: src/sys/arch/arc bus_dma implementation for jazz dma tlb,
details: https://anonhg.NetBSD.org/src/rev/a8e07d49aaef
branches: trunk
changeset: 487548:a8e07d49aaef
user: soda <soda%NetBSD.org@localhost>
date: Fri Jun 09 05:22:22 2000 +0000
description:
bus_dma implementation for jazz dma tlb,
contributed by Shuichiro URATA <ur%a-r.org@localhost>
diffstat:
sys/arch/arc/dev/dma.c | 147 +++-----------------
sys/arch/arc/dev/dma.h | 42 +-----
sys/arch/arc/jazz/bus_dma_jazz.c | 264 ++++++++++++++++++++++++++++++++++++++
sys/arch/arc/jazz/jazzdmatlb.c | 201 ++++++++++++++++++++++++++++
sys/arch/arc/jazz/jazzdmatlbreg.h | 69 +++++++++
sys/arch/arc/jazz/jazzdmatlbvar.h | 38 +++++
6 files changed, 600 insertions(+), 161 deletions(-)
diffs (truncated from 913 to 300 lines):
diff -r 02dc0f1df966 -r a8e07d49aaef sys/arch/arc/dev/dma.c
--- a/sys/arch/arc/dev/dma.c Fri Jun 09 05:17:26 2000 +0000
+++ b/sys/arch/arc/dev/dma.c Fri Jun 09 05:22:22 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: dma.c,v 1.14 2000/03/30 21:37:51 soren Exp $ */
+/* $NetBSD: dma.c,v 1.15 2000/06/09 05:22:24 soda Exp $ */
/* $OpenBSD: dma.c,v 1.5 1998/03/01 16:49:57 niklas Exp $ */
/*
@@ -37,8 +37,7 @@
*/
/*
- * PICA system dma driver. Handles resource allocation and
- * logical (viritual) address remaping.
+ * PICA system dma driver.
*/
#include <sys/param.h>
@@ -66,20 +65,15 @@
#include <arc/pica/pica.h>
#include <arc/pica/rd94.h>
#include <arc/arc/arctype.h>
+#include <arc/jazz/jazzdmatlbreg.h>
+#include <arc/jazz/jazzdmatlbvar.h>
#include <arc/dev/dma.h>
void picaDmaReset __P((dma_softc_t *sc));
void picaDmaEnd __P((dma_softc_t *sc));
void picaDmaNull __P((dma_softc_t *sc));
-extern vm_map_t phys_map;
-
-#define dma_pte_to_pa(x) (((x) - first_dma_pte) * R4030_DMA_PAGE_SIZE)
-
-dma_pte_t *free_dma_pte; /* Pointer to free dma pte list */
-dma_pte_t *first_dma_pte; /* Pointer to first dma pte */
-
-static vaddr_t ivalid_reg;
+extern struct arc_bus_space pica_bus; /* XXX */
/*
* Initialize the dma mapping register area and pool.
@@ -87,29 +81,16 @@
void
picaDmaInit()
{
- int map = PICA_TL_BASE;
-
- mips3_FlushCache(); /* Make sure no map entries are cached */
-
- bzero((char *)map, PICA_TL_SIZE);
- free_dma_pte = (dma_pte_t *)map;
- first_dma_pte = (dma_pte_t *)map;
- free_dma_pte->queue.next = NULL;
- free_dma_pte->queue.size = PICA_TL_SIZE / sizeof(dma_pte_t);
-
switch (cputype) {
case ACER_PICA_61:
case MAGNUM:
- out32(R4030_SYS_TL_BASE, MIPS_KSEG1_TO_PHYS(map));
- out32(R4030_SYS_TL_LIMIT, PICA_TL_SIZE);
- out32(R4030_SYS_TL_IVALID, 0);
- ivalid_reg = R4030_SYS_TL_IVALID;
+ jazz_dmatlb_init(&pica_bus, R4030_SYS_TL_BASE);
break;
+ case NEC_R94:
+ case NEC_RAx94:
case NEC_RD94:
- out32(RD94_SYS_TL_BASE, MIPS_KSEG1_TO_PHYS(map));
- out32(RD94_SYS_TL_LIMIT, PICA_TL_SIZE);
- out32(RD94_SYS_TL_IVALID, 0);
- ivalid_reg = RD94_SYS_TL_IVALID;
+ case NEC_R96:
+ jazz_dmatlb_init(&pica_bus, RD94_SYS_TL_BASE);
break;
}
}
@@ -121,36 +102,8 @@
void
picaDmaTLBAlloc(dma_softc_t *dma)
{
- dma_pte_t *list;
- dma_pte_t *found;
- int size;
- int s;
-
- found = NULL;
- size = dma->pte_size;
- do {
- list = (dma_pte_t *)&free_dma_pte;
- s = splhigh();
- while(list) {
- if(list->queue.next->queue.size >= size) {
- found = list->queue.next;
- break;
- }
- }
-/*XXX Wait for release wakeup */
- } while(found == NULL);
- if(found->queue.size == size) {
- list->queue.next = found->queue.next;
- }
- else {
- list->queue.next = found + size;
- list = found + size;
- list->queue.next = found->queue.next;
- list->queue.size = found->queue.size - size;
- }
- splx(s);
- dma->pte_base = found;
- dma->dma_va = dma_pte_to_pa(found);
+ dma->pte_base = jazz_dmatlb_alloc(dma->pte_size, 0, BUS_DMA_WAITOK,
+ &dma->dma_va);
}
/*
@@ -159,43 +112,8 @@
void
picaDmaTLBFree(dma_softc_t *dma)
{
- dma_pte_t *list;
- dma_pte_t *entry;
- int size;
- int s;
+ jazz_dmatlb_free(dma->dma_va, dma->pte_size);
- s = splhigh();
- entry = dma->pte_base;
- size = dma->pte_size;
- entry->queue.next = NULL;
- entry->queue.size = size;
- if(free_dma_pte == NULL || entry < free_dma_pte) {
- list = entry;
- list->queue.next = free_dma_pte;
- free_dma_pte = entry;
- }
- else {
- list = free_dma_pte;
- while(list < entry && list->queue.next != NULL) {
- if(list + list->queue.size == entry) {
- list->queue.size += size;
- break;
- }
- else if(list->queue.next == NULL) {
- list->queue.next = entry;
- break;
- }
- else
- list = list->queue.next;
- }
- }
- if(list->queue.next != NULL) {
- if(list + list->queue.size == list->queue.next) {
- list->queue.size += list->queue.next->queue.size;
- list->queue.next = list->queue.next->queue.next;
- }
- }
- splx(s);
/*XXX Wakeup waiting */
}
@@ -207,32 +125,14 @@
void
picaDmaTLBMap(dma_softc_t *sc)
{
- paddr_t pa;
vaddr_t va;
- dma_pte_t *dma_pte;
- int nbytes;
+ jazz_dma_pte_t *dma_pte;
va = sc->next_va - sc->dma_va;
- dma_pte = sc->pte_base + (va / R4030_DMA_PAGE_SIZE);
- nbytes = dma_page_round(sc->next_size + dma_page_offs(va));
- va = sc->req_va;
- while(nbytes > 0) {
- if(va < VM_MIN_KERNEL_ADDRESS) {
- pa = MIPS_KSEG0_TO_PHYS(va);
- }
- else {
- if (!pmap_extract(vm_map_pmap(phys_map), va, &pa))
- panic("picaDmaTLBMap: pmap_extract %p", va);
- }
- pa &= R4030_DMA_PAGE_NUM;
- if(pa == 0)
- panic("picaDmaTLBMap: null page frame");
- dma_pte->entry.lo_addr = pa;
- dma_pte->entry.hi_addr = 0;
- dma_pte++;
- va += R4030_DMA_PAGE_SIZE;
- nbytes -= R4030_DMA_PAGE_SIZE;
- }
+ dma_pte = sc->pte_base + (va / JAZZ_DMA_PAGE_SIZE);
+
+ jazz_dmatlb_map_va(NULL, sc->req_va, sc->next_size, dma_pte);
+
}
/*
@@ -254,12 +154,12 @@
/* Remap request space va into dma space va */
sc->req_va = (int)addr;
- sc->next_va = sc->dma_va + dma_page_offs(addr);
+ sc->next_va = sc->dma_va + jazz_dma_page_offs(addr);
sc->next_size = size;
/* Map up the request viritual dma space */
picaDmaTLBMap(sc);
- out32(ivalid_reg, 0); /* Flush dma map cache */
+ jazz_dmatlb_flush();
/* Load new transfer parameters */
regs->dma_addr = sc->next_va;
@@ -292,7 +192,7 @@
/* Remap request space va into dma space va */
sc->req_va = (vaddr_t)addr;
- sc->next_va = sc->dma_va + dma_page_offs(addr) + offset;
+ sc->next_va = sc->dma_va + jazz_dma_page_offs(addr) + offset;
sc->next_size = size;
/* Map up the request viritual dma space */
@@ -309,7 +209,7 @@
size_t size;
int datain;
{
- out32(ivalid_reg, 0); /* Flush dma map cache */
+ jazz_dmatlb_flush();
}
/*
@@ -389,7 +289,10 @@
sc->end = picaDmaEnd;
switch (cputype) {
+ case NEC_R94:
+ case NEC_RAx94:
case NEC_RD94:
+ case NEC_R96:
sc->dma_reg = (pDmaReg)RD94_SYS_DMA0_REGS;
break;
default:
diff -r 02dc0f1df966 -r a8e07d49aaef sys/arch/arc/dev/dma.h
--- a/sys/arch/arc/dev/dma.h Fri Jun 09 05:17:26 2000 +0000
+++ b/sys/arch/arc/dev/dma.h Fri Jun 09 05:22:22 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: dma.h,v 1.6 2000/02/22 11:26:00 soda Exp $ */
+/* $NetBSD: dma.h,v 1.7 2000/06/09 05:22:25 soda Exp $ */
/* $OpenBSD: dma.h,v 1.3 1997/04/19 17:19:51 pefo Exp $ */
/*
@@ -32,19 +32,6 @@
*/
/*
- * The R4030 system has four dma channels capable of scatter/gather
- * and full memory addressing. The maximum transfer length is 1Mb.
- * Dma snopes the L2 cache so no precaution is required. However
- * if L1 cache is cached 'write back' the processor is responible
- * for flushing/invalidating it.
- *
- * The dma mapper has up to 4096 page descriptors.
- */
-
-#define PICA_TL_BASE 0xa0008000 /* Base of tl register area */
-#define PICA_TL_SIZE 0x00008000 /* Size of tl register area */
-
-/*
* Hardware dma registers.
*/
typedef volatile struct {
@@ -83,26 +70,7 @@
#define R4030_DMA_ENAB_ME_IE 0x200 /* Memory error int enable */
#define R4030_DMA_ENAB_TL_IE 0x400 /* Translation limit int enable */
-#define R4030_DMA_COUNT_MASK 0x00fffff /* Byte count mask */
-#define R4030_DMA_PAGE_NUM 0xffff000 /* Address page number */
-#define R4030_DMA_PAGE_OFFS 0x0000fff /* Address page offset */
-#define R4030_DMA_PAGE_SIZE 0x0001000 /* Address page size */
-
-
-/*
- * Dma TLB entry
- */
-
-typedef union dma_pte {
- struct {
- paddr_t lo_addr; /* Low part of translation addr */
- paddr_t hi_addr; /* High part of translation addr */
- } entry;
- struct bbb {
- union dma_pte *next; /* Next free translation entry */
- int size; /* Number of consecutive free entrys */
- } queue;
-} dma_pte_t;
+#define R4030_DMA_COUNT_MASK 0x000fffff /* Byte count mask */
/*
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