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[src/trunk]: src/sys/dev/pci - add a pciide_irqack() callback, which clears t...
details: https://anonhg.NetBSD.org/src/rev/628e5a9cb57d
branches: trunk
changeset: 487776:628e5a9cb57d
user: bouyer <bouyer%NetBSD.org@localhost>
date: Mon Jun 12 21:20:51 2000 +0000
description:
- add a pciide_irqack() callback, which clears the IDE DMA status bit once
the IRQ has been cleared on the drive.
- use pa->pa_class instead of re-reading PCI_CLASS_REG when possible
- Add support for Highpoint HPT366 and HPT370 (370 untested), based
on patches from Roger Brooks <R.S.Brooks%liverpool.ac.uk@localhost> posted on
current-users Mach, 15. Given how Highpoint docs have been wrong for the
366, the 370 is likely to not work.
Thanks to Chris Cappuccio <chris%dqc.org@localhost> for sending me the Highpoint
docs, and to Total Archive (http://www.totalarchive.com/) for sending
me hardware.
diffstat:
sys/dev/pci/pciide.c | 339 ++++++++++++++++++++++++++++++++++++------
sys/dev/pci/pciide_hpt_reg.h | 125 +++++++++++++++
2 files changed, 411 insertions(+), 53 deletions(-)
diffs (truncated from 695 to 300 lines):
diff -r fd9d3406071a -r 628e5a9cb57d sys/dev/pci/pciide.c
--- a/sys/dev/pci/pciide.c Mon Jun 12 21:12:59 2000 +0000
+++ b/sys/dev/pci/pciide.c Mon Jun 12 21:20:51 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pciide.c,v 1.66 2000/06/07 20:42:52 scw Exp $ */
+/* $NetBSD: pciide.c,v 1.67 2000/06/12 21:20:51 bouyer Exp $ */
/*
@@ -116,7 +116,7 @@
#include <dev/pci/pciide_acer_reg.h>
#include <dev/pci/pciide_pdc202xx_reg.h>
#include <dev/pci/pciide_opti_reg.h>
-
+#include <dev/pci/pciide_hpt_reg.h>
#include <dev/pci/cy82c693var.h>
/* inlines for reading/writing 8-bit PCI registers */
@@ -190,11 +190,16 @@
void opti_chip_map __P((struct pciide_softc*, struct pci_attach_args*));
void opti_setup_channel __P((struct channel_softc*));
+void hpt_chip_map __P((struct pciide_softc*, struct pci_attach_args*));
+void hpt_setup_channel __P((struct channel_softc*));
+int hpt_pci_intr __P((void *));
+
void pciide_channel_dma_setup __P((struct pciide_channel *));
int pciide_dma_table_setup __P((struct pciide_softc*, int, int));
int pciide_dma_init __P((void*, int, int, void *, size_t, int));
void pciide_dma_start __P((void*, int, int));
int pciide_dma_finish __P((void*, int, int, int));
+void pciide_irqack __P((struct channel_softc *));
void pciide_print_modes __P((struct pciide_channel *));
struct pciide_product_desc {
@@ -379,6 +384,18 @@
}
};
+const struct pciide_product_desc pciide_triones_products[] = {
+ { PCI_PRODUCT_TRIONES_HPT366,
+ IDE_PCI_CLASS_OVERRIDE,
+ "Triones/Highpoint HPT366/370 UDMA/66 IDE Controller",
+ hpt_chip_map,
+ },
+ { 0,
+ 0,
+ NULL,
+ }
+};
+
struct pciide_vendor_desc {
u_int32_t ide_vendor;
const struct pciide_product_desc *ide_products;
@@ -394,6 +411,7 @@
{ PCI_VENDOR_PROMISE, pciide_promise_products },
{ PCI_VENDOR_AMD, pciide_amd_products },
{ PCI_VENDOR_OPTI, pciide_opti_products },
+ { PCI_VENDOR_TRIONES, pciide_triones_products },
{ 0, NULL }
};
@@ -509,7 +527,6 @@
if (wdcdebug_pciide_mask & DEBUG_PROBE)
pci_conf_print(sc->sc_pc, sc->sc_tag, NULL);
#endif
-
sc->sc_pp->chip_map(sc, pa);
if (sc->sc_dma_ok) {
@@ -953,11 +970,6 @@
bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
IDEDMA_CMD + IDEDMA_SCH_OFFSET * channel) & ~IDEDMA_CMD_START);
- /* Clear status bits */
- bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
- IDEDMA_CTL + IDEDMA_SCH_OFFSET * channel,
- status);
-
/* Unload the map of the data buffer */
bus_dmamap_sync(sc->sc_dmat, dma_maps->dmamap_xfer, 0,
dma_maps->dmamap_xfer->dm_mapsize,
@@ -985,6 +997,20 @@
return error;
}
+void
+pciide_irqack(chp)
+ struct channel_softc *chp;
+{
+ struct pciide_channel *cp = (struct pciide_channel*)chp;
+ struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
+
+ /* clear status bits in IDE DMA registers */
+ bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
+ IDEDMA_CTL + IDEDMA_SCH_OFFSET * chp->channel,
+ bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
+ IDEDMA_CTL + IDEDMA_SCH_OFFSET * chp->channel));
+}
+
/* some common code used by several chip_map */
int
pciide_chansetup(sc, channel, interface)
@@ -1121,8 +1147,7 @@
struct pci_attach_args *pa;
{
struct pciide_channel *cp;
- pcireg_t interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc,
- sc->sc_tag, PCI_CLASS_REG));
+ pcireg_t interface = PCI_INTERFACE(pa->pa_class);
pcireg_t csr;
int channel, drive;
struct ata_drive_datas *drvp;
@@ -1153,8 +1178,10 @@
sc->sc_dma_ok = 0;
}
printf("\n");
- if (sc->sc_dma_ok)
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
+ if (sc->sc_dma_ok) {
+ sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
+ sc->sc_wdcdev.irqack = pciide_irqack;
+ }
sc->sc_wdcdev.PIO_cap = 0;
sc->sc_wdcdev.DMA_cap = 0;
@@ -1271,8 +1298,11 @@
sc->sc_wdcdev.sc_dev.dv_xname);
pciide_mapreg_dma(sc, pa);
printf("\n");
+ sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
+ WDC_CAPABILITY_MODE;
if (sc->sc_dma_ok) {
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
+ sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
+ sc->sc_wdcdev.irqack = pciide_irqack;
switch(sc->sc_pp->ide_product) {
case PCI_PRODUCT_INTEL_82371AB_IDE:
case PCI_PRODUCT_INTEL_82801AA_IDE:
@@ -1280,8 +1310,6 @@
sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
}
}
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
- WDC_CAPABILITY_MODE;
sc->sc_wdcdev.PIO_cap = 4;
sc->sc_wdcdev.DMA_cap = 2;
sc->sc_wdcdev.UDMA_cap =
@@ -1673,8 +1701,7 @@
struct pci_attach_args *pa;
{
struct pciide_channel *cp;
- pcireg_t interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc,
- sc->sc_tag, PCI_CLASS_REG));
+ pcireg_t interface = PCI_INTERFACE(pa->pa_class);
int channel;
pcireg_t chanenable;
bus_size_t cmdsize, ctlsize;
@@ -1685,10 +1712,13 @@
sc->sc_wdcdev.sc_dev.dv_xname);
pciide_mapreg_dma(sc, pa);
printf("\n");
- if (sc->sc_dma_ok)
+ sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
+ WDC_CAPABILITY_MODE;
+ if (sc->sc_dma_ok) {
sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
- WDC_CAPABILITY_MODE;
+ sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
+ sc->sc_wdcdev.irqack = pciide_irqack;
+ }
sc->sc_wdcdev.PIO_cap = 4;
sc->sc_wdcdev.DMA_cap = 2;
sc->sc_wdcdev.UDMA_cap = 4;
@@ -1809,8 +1839,7 @@
struct pci_attach_args *pa;
{
struct pciide_channel *cp;
- pcireg_t interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc,
- sc->sc_tag, PCI_CLASS_REG));
+ pcireg_t interface = PCI_INTERFACE(pa->pa_class);
int channel;
u_int32_t ideconf;
bus_size_t cmdsize, ctlsize;
@@ -1821,19 +1850,20 @@
sc->sc_wdcdev.sc_dev.dv_xname);
pciide_mapreg_dma(sc, pa);
printf("\n");
+ sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
+ WDC_CAPABILITY_MODE;
if (sc->sc_dma_ok) {
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
+ sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
+ sc->sc_wdcdev.irqack = pciide_irqack;
if (sc->sc_pp->ide_product == PCI_PRODUCT_VIATECH_VT82C586A_IDE)
sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
}
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA32 | WDC_CAPABILITY_MODE;
sc->sc_wdcdev.PIO_cap = 4;
sc->sc_wdcdev.DMA_cap = 2;
sc->sc_wdcdev.UDMA_cap = 2;
sc->sc_wdcdev.set_modes = apollo_setup_channel;
sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
WDCDEBUG_PRINT(("apollo_chip_map: old APO_IDECONF=0x%x, "
"APO_CTLMISC=0x%x, APO_DATATIM=0x%x, APO_UDMA=0x%x\n",
@@ -1961,8 +1991,7 @@
struct pciide_channel *cp = &sc->pciide_channels[channel];
bus_size_t cmdsize, ctlsize;
u_int8_t ctrl = pciide_pci_read(sc->sc_pc, sc->sc_tag, CMD_CTRL);
- int interface =
- PCI_INTERFACE(pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CLASS_REG));
+ int interface = PCI_INTERFACE(pa->pa_class);
sc->wdc_chanarray[channel] = &cp->wdc_channel;
cp->name = PCIIDE_CHANNEL_NAME(channel);
@@ -2074,7 +2103,7 @@
sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
+ sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16;
for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
cmd_channel_map(pa, sc, channel);
@@ -2107,13 +2136,15 @@
sc->sc_wdcdev.sc_dev.dv_xname);
pciide_mapreg_dma(sc, pa);
printf("\n");
- if (sc->sc_dma_ok)
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
+ sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
+ WDC_CAPABILITY_MODE;
+ if (sc->sc_dma_ok) {
+ sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
+ sc->sc_wdcdev.irqack = pciide_irqack;
+ }
sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
- WDC_CAPABILITY_MODE;
sc->sc_wdcdev.PIO_cap = 4;
sc->sc_wdcdev.DMA_cap = 2;
sc->sc_wdcdev.set_modes = cmd0643_6_setup_channel;
@@ -2190,8 +2221,7 @@
struct pci_attach_args *pa;
{
struct pciide_channel *cp;
- pcireg_t interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc,
- sc->sc_tag, PCI_CLASS_REG));
+ pcireg_t interface = PCI_INTERFACE(pa->pa_class);
bus_size_t cmdsize, ctlsize;
if (pciide_chipen(sc, pa) == 0)
@@ -2228,10 +2258,12 @@
sc->sc_dma_ok = 0;
}
- if (sc->sc_dma_ok)
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
+ sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
WDC_CAPABILITY_MODE;
+ if (sc->sc_dma_ok) {
+ sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
+ sc->sc_wdcdev.irqack = pciide_irqack;
+ }
sc->sc_wdcdev.PIO_cap = 4;
sc->sc_wdcdev.DMA_cap = 2;
sc->sc_wdcdev.set_modes = cy693_setup_channel;
@@ -2353,10 +2385,8 @@
struct pciide_channel *cp;
int channel;
u_int8_t sis_ctr0 = pciide_pci_read(sc->sc_pc, sc->sc_tag, SIS_CTRL0);
- pcireg_t interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc,
- sc->sc_tag, PCI_CLASS_REG));
- pcireg_t rev = PCI_REVISION(pci_conf_read(sc->sc_pc,
- sc->sc_tag, PCI_CLASS_REG));
+ pcireg_t interface = PCI_INTERFACE(pa->pa_class);
+ pcireg_t rev = PCI_REVISION(pa->pa_class);
bus_size_t cmdsize, ctlsize;
if (pciide_chipen(sc, pa) == 0)
@@ -2365,14 +2395,15 @@
sc->sc_wdcdev.sc_dev.dv_xname);
pciide_mapreg_dma(sc, pa);
printf("\n");
+ sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
+ WDC_CAPABILITY_MODE;
if (sc->sc_dma_ok) {
- sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
+ sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
+ sc->sc_wdcdev.irqack = pciide_irqack;
if (rev >= 0xd0)
sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
}
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