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[src/trunk]: src/sys/arch SH4!
details: https://anonhg.NetBSD.org/src/rev/26cf78022b2b
branches: trunk
changeset: 482890:26cf78022b2b
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Thu Feb 24 23:32:26 2000 +0000
description:
SH4!
diffstat:
sys/arch/evbsh3/conf/files.evbsh3 | 7 +-
sys/arch/evbsh3/evbsh3/conf.c | 4 +-
sys/arch/evbsh3/evbsh3/genassym.cf | 3 +-
sys/arch/evbsh3/evbsh3/locore.s | 151 +++++++++++++++++++++++++++++++-----
sys/arch/evbsh3/evbsh3/machdep.c | 36 ++++++++-
sys/arch/evbsh3/evbsh3/shb.c | 10 +-
sys/arch/evbsh3/include/Makefile | 4 +-
sys/arch/evbsh3/include/sh3.h | 10 --
sys/arch/sh3/include/bus.h | 23 +++++-
sys/arch/sh3/include/cpu.h | 8 +-
sys/arch/sh3/include/cpufunc.h | 56 +++++++++++++-
sys/arch/sh3/include/pmap.h | 24 +++++-
sys/arch/sh3/include/pte.h | 12 ++-
sys/arch/sh3/sh3/pmap.c | 28 ++++++-
sys/arch/sh3/sh3/trap.c | 115 +++++++++++++++++++++++++++-
15 files changed, 431 insertions(+), 60 deletions(-)
diffs (truncated from 996 to 300 lines):
diff -r e518b1f863df -r 26cf78022b2b sys/arch/evbsh3/conf/files.evbsh3
--- a/sys/arch/evbsh3/conf/files.evbsh3 Thu Feb 24 22:54:39 2000 +0000
+++ b/sys/arch/evbsh3/conf/files.evbsh3 Thu Feb 24 23:32:26 2000 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.evbsh3,v 1.2 2000/02/24 19:42:35 msaitoh Exp $
+# $NetBSD: files.evbsh3,v 1.3 2000/02/24 23:32:31 msaitoh Exp $
#
# new style config file for sh3 architecture
#
@@ -11,5 +11,6 @@
defopt opt_memsize.h IOM_ROM_BEGIN IOM_ROM_SIZE IOM_RAM_BEGIN IOM_RAM_SIZE
defopt opt_led_addr.h LED_ADDR
defopt opt_initbsc.h BSC_BCR1_VAL BSC_BCR2_VAL BSC_WCR1_VAL BSC_WCR2_VAL
- BSC_MCR_VAL BSC_SDMR_VAL BSC_RTCSR_VAL BSC_RTCNT_VAL
- BSC_RTCOR_VAL FRQCR_VAL PFC_SCPCR_VAL
+ BSC_WCR3_VAL BSC_MCR_VAL BSC_SDMR2_VAL BSC_SDMR3_VAL
+ BSC_RTCSR_VAL BSC_RTCNT_VAL BSC_RTCOR_VAL BSC_RFCR_VAL
+ FRQCR_VAL PFC_SCPCR_VAL
diff -r e518b1f863df -r 26cf78022b2b sys/arch/evbsh3/evbsh3/conf.c
--- a/sys/arch/evbsh3/evbsh3/conf.c Thu Feb 24 22:54:39 2000 +0000
+++ b/sys/arch/evbsh3/evbsh3/conf.c Thu Feb 24 23:32:26 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: conf.c,v 1.3 2000/02/24 17:07:36 msaitoh Exp $ */
+/* $NetBSD: conf.c,v 1.4 2000/02/24 23:32:31 msaitoh Exp $ */
/*
* Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
@@ -37,6 +37,8 @@
#include <sys/conf.h>
#include <sys/vnode.h>
+#include <machine/conf.h>
+
#include "wd.h"
bdev_decl(wd);
bdev_decl(sw);
diff -r e518b1f863df -r 26cf78022b2b sys/arch/evbsh3/evbsh3/genassym.cf
--- a/sys/arch/evbsh3/evbsh3/genassym.cf Thu Feb 24 22:54:39 2000 +0000
+++ b/sys/arch/evbsh3/evbsh3/genassym.cf Thu Feb 24 23:32:26 2000 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.4 2000/02/24 19:42:36 msaitoh Exp $
+# $NetBSD: genassym.cf,v 1.5 2000/02/24 23:32:31 msaitoh Exp $
#
# Copyright (c) 1995, 1997 Charles M. Hannum. All rights reserved.
@@ -53,7 +53,6 @@
include <uvm/uvm_extern.h>
-include <machine/sh3.h>
include <machine/trap.h>
include <machine/pmap.h>
include <machine/vmparam.h>
diff -r e518b1f863df -r 26cf78022b2b sys/arch/evbsh3/evbsh3/locore.s
--- a/sys/arch/evbsh3/evbsh3/locore.s Thu Feb 24 22:54:39 2000 +0000
+++ b/sys/arch/evbsh3/evbsh3/locore.s Thu Feb 24 23:32:26 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.10 2000/02/24 19:42:36 msaitoh Exp $ */
+/* $NetBSD: locore.s,v 1.11 2000/02/24 23:32:32 msaitoh Exp $ */
/*-
* Copyright (c) 1993, 1994, 1995, 1997
@@ -51,7 +51,7 @@
#include <machine/pte.h>
#include <machine/trap.h>
-#define INIT_STACK 0x8c3ff000
+#define INIT_STACK IOM_RAM_BEGIN + 0x003ff000
#define SHREG_EXPEVT 0xffffffd4
#define SHREG_INTEVT 0xffffffd8
#define SHREG_MMUCR 0xffffffe0
@@ -239,9 +239,9 @@
*
* XXX 4 == sizeof pde
*/
- .set _C_LABEL(APTmap),(PDSLOT_APTE << PDSHIFT)
- .set _C_LABEL(APTD),(_C_LABEL(APTmap) + PDSLOT_APTE * NBPG)
- .set _C_LABEL(APTDpde),(_C_LABEL(PTD) + PDSLOT_APTE * 4)
+ .set _C_LABEL(APTmap), (PDSLOT_APTE << PDSHIFT)
+ .set _C_LABEL(APTD), (_C_LABEL(APTmap) + PDSLOT_APTE * NBPG)
+ .set _C_LABEL(APTDpde), (_C_LABEL(PTD) + PDSLOT_APTE * 4)
/*
* Initialization
@@ -352,6 +352,36 @@
mov.l r15, @r3
#endif
+#ifdef SH4
+ /* CCR must be accessed from P2 area */
+ mova cache_on, r0
+ mov r0, r5
+ mov.l XLtoP2, r1
+ add r1, r5
+ mova main_label, r0
+ mov r0, r2
+ mov.l XL_SHREG_CCR, r3
+ mov.l XL_CCRVAL, r4
+ jmp @r5
+ nop
+
+ .align 2
+cache_on:
+ mov.l r4, @r3 /* Write to CCR */
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ jmp @r2
+ nop
+
+ .align 2
+main_label:
+#endif
mov.l XLmain, r0
jsr @r0 /* call main() */
nop
@@ -370,6 +400,15 @@
XLKernelStack: .long KernelStack
XLinitSH3: .long _C_LABEL(initSH3)
XLmain: .long _C_LABEL(main)
+XLtoP2: .long 0x20000000
+XL_SHREG_CCR: .long 0xff00001c
+#ifdef SH4
+#if 1
+XL_CCRVAL: .long 0x0909 /* Operand cache ON */
+#else
+XL_CCRVAL: .long 0x0000 /* cache OFF */
+#endif
+#endif
NENTRY(proc_trampoline)
mov r11, r4
@@ -471,7 +510,6 @@
tst r0, r0
bf sw1
nop
- STI
ESTI
sleep
@@ -555,16 +593,14 @@
switch_error:
mova 1f, r0
mov r0, r4
- mov.l XL_panic, r0
+ mov.l 2f, r0
jsr @r0
nop
.align 2
-1:
- .asciz "cpu_swicth"
+1: .asciz "cpu_swicth"
.align 2
-XL_panic:
- .long _C_LABEL(panic)
+2: .long _C_LABEL(panic)
#endif
/*
@@ -794,11 +830,9 @@
nop
.align 2
-1:
- .asciz "switch[i=%d,whichqs=0x%0x]\n"
+1: .asciz "switch[i=%d,whichqs=0x%0x]\n"
.align 2
-2:
- .long _C_LABEL(printf)
+2: .long _C_LABEL(printf)
#endif
3:
@@ -942,6 +976,10 @@
mov #4, r1
mov.l @r0, r2
or r1, r2
+#ifdef SH4
+ mov.l XL_MMUCR_VBITS,r1
+ and r1, r2
+#endif
mov.l r2, @r0
switch_restored:
@@ -982,6 +1020,7 @@
XXXLcurproc: .long _C_LABEL(curproc)
XL_ConvVtoP: .long _ConvVtoP
XL_KernelSp: .long KernelSp
+XL_MMUCR_VBITS: .long 0xfcfcff05
/*
* switch_exit(struct proc *p);
* Switch to proc0's saved context and deallocate the address space and kernel
@@ -1144,7 +1183,7 @@
mov #1, r1
mov #31, r2
shld r2, r1
- tst r1, r0 /* test MSB of TF_SPC */
+ tst r1, r0 /* test MSB of TF_SPC */
bf 1f
nop
5: xor r0, r0
@@ -1161,7 +1200,9 @@
add #4, r15
bra 2b
nop
-1: INTRFASTEXIT
+1:
+ CLI
+ INTRFASTEXIT
.align 2
XL_TLBPROTWR:
@@ -1169,7 +1210,6 @@
.globl _C_LABEL(tlbmisshandler_stub)
.globl _C_LABEL(tlbmisshandler_stub_end)
-
_C_LABEL(tlbmisshandler_stub):
mov.l XL_tlbmisshandler, r0
jmp @r0
@@ -1256,6 +1296,65 @@
* r4 = Virtual Address
* r0 = returned Physical address
*/
+#ifdef SH4
+ENTRY(ConvVtoP)
+ mov.l r1, @-r15
+ mov.l r2, @-r15
+ mov.l r3, @-r15
+ mov.l r5, @-r15
+#ifdef SH4 /* cache flush */
+ sts.l pr, @-r15
+ mov.l r4, @-r15
+ mov.l XL_cacheflush, r0
+ jsr @r0
+ nop
+ mov.l @r15+, r4
+ lds.l @r15+, pr
+#endif
+ mov r4, r0
+ mov.l XL_CSMASK, r1
+ mov.l XL_KCSAREA, r2
+ and r4, r1
+ cmp/eq r1, r2
+ bt 1f
+ mov.l XL_P2AREA, r5
+ mov #PDSHIFT, r1
+ neg r1, r1
+ shld r1, r0
+ shll2 r0
+ mov.l XXXL_SHREG_TTB, r1
+ or r5, r1
+ mov.l @r1, r1
+ add r0, r1
+ or r5, r1
+ mov.l @r1, r2 /* r2 = pde */
+ mov.l XL_PG_FRAME, r1
+ and r1, r2 /* r2 = page table address */
+ mov r4, r0
+ mov.l XL_PT_MASK, r3
+ and r3, r0
+ mov #PGSHIFT, r1
+ neg r1, r1
+ shld r1, r0
+ shll2 r0
+ add r0, r2 /* r2 = pte */
+ or r5, r2
+ mov.l @r2, r2
+ mov.l XL_PG_FRAME, r1
+ and r1, r2
+ not r1, r1
+ and r1, r4
+ or r4, r2
+ or r5, r2
+ mov r2, r0 /* r0 = Physical address */
+1:
+ mov.l @r15+, r5
+ mov.l @r15+, r3
+ mov.l @r15+, r2
+ mov.l @r15+, r1
+ rts
+ nop
+#else
ENTRY(ConvVtoP)
mov.l r1, @-r15
mov.l r2, @-r15
@@ -1298,12 +1397,18 @@
rts
nop
+#endif
.align 2
XL_PT_MASK: .long PT_MASK
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