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[src/trunk]: src/sys/arch/newsmips Adapt cpu_intr change.
details: https://anonhg.NetBSD.org/src/rev/77e51c446d91
branches: trunk
changeset: 484883:77e51c446d91
user: tsubai <tsubai%NetBSD.org@localhost>
date: Fri Apr 14 10:11:06 2000 +0000
description:
Adapt cpu_intr change.
diffstat:
sys/arch/newsmips/dev/zs.c | 12 +----
sys/arch/newsmips/include/cpu.h | 7 +--
sys/arch/newsmips/include/intr.h | 33 ++++++++----
sys/arch/newsmips/newsmips/machdep.c | 90 ++++++++++++++++++++++------------
sys/arch/newsmips/newsmips/news3400.c | 40 ++++++++++----
sys/arch/newsmips/newsmips/news5000.c | 26 +++++-----
6 files changed, 122 insertions(+), 86 deletions(-)
diffs (truncated from 431 to 300 lines):
diff -r 3d6126697c94 -r 77e51c446d91 sys/arch/newsmips/dev/zs.c
--- a/sys/arch/newsmips/dev/zs.c Fri Apr 14 08:36:39 2000 +0000
+++ b/sys/arch/newsmips/dev/zs.c Fri Apr 14 10:11:06 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: zs.c,v 1.11 1999/12/26 09:05:39 tsubai Exp $ */
+/* $NetBSD: zs.c,v 1.12 2000/04/14 10:11:06 tsubai Exp $ */
/*-
* Copyright (c) 1996 The NetBSD Foundation, Inc.
@@ -94,16 +94,6 @@
static volatile int zssoftpending;
-#define setsoftserial() \
-{ \
- int s; \
- extern int softisr; \
- \
- s = splhigh(); \
- softisr |= SOFTISR_ZS; \
- splx(s); \
-}
-
/*
* Our ZS chips all share a common, autovectored interrupt,
* so we have to look at all of them on each interrupt.
diff -r 3d6126697c94 -r 77e51c446d91 sys/arch/newsmips/include/cpu.h
--- a/sys/arch/newsmips/include/cpu.h Fri Apr 14 08:36:39 2000 +0000
+++ b/sys/arch/newsmips/include/cpu.h Fri Apr 14 10:11:06 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.6 2000/03/24 23:06:05 soren Exp $ */
+/* $NetBSD: cpu.h,v 1.7 2000/04/14 10:11:06 tsubai Exp $ */
#ifndef _MACHINE_CPU_H_
#define _MACHINE_CPU_H_
@@ -6,11 +6,6 @@
#include <mips/cpu.h>
#include <mips/cpuregs.h>
-#define MIPS_INT_MASK_FPU MIPS_INT_MASK_3
-
-#define INT_MASK_REAL_DEV (MIPS_HARD_INT_MASK &~ MIPS_INT_MASK_3)
-#define INT_MASK_FPU_DEAL MIPS_INT_MASK_3
-
#ifndef _LOCORE
extern int systype;
diff -r 3d6126697c94 -r 77e51c446d91 sys/arch/newsmips/include/intr.h
--- a/sys/arch/newsmips/include/intr.h Fri Apr 14 08:36:39 2000 +0000
+++ b/sys/arch/newsmips/include/intr.h Fri Apr 14 10:11:06 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.6 1999/12/31 08:15:48 tsubai Exp $ */
+/* $NetBSD: intr.h,v 1.7 2000/04/14 10:11:06 tsubai Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -54,10 +54,25 @@
extern void _setsoftintr __P((int));
extern void _clrsoftintr __P((int));
+/*
+ * software simulated interrupt
+ */
+#define SIR_NET 0x01
+#define SIR_SERIAL 0x02
+
+#define setsoft(x) do { \
+ extern u_int ssir; \
+ int s; \
+ \
+ s = splhigh(); \
+ ssir |= (x); \
+ _setsoftintr(MIPS_SOFT_INT_MASK_1); \
+ splx(s); \
+} while (0)
+
#define setsoftclock() _setsoftintr(MIPS_SOFT_INT_MASK_0)
-#define setsoftnet() _setsoftintr(MIPS_SOFT_INT_MASK_1)
-#define clearsoftclock() _clrsoftintr(MIPS_SOFT_INT_MASK_0)
-#define clearsoftnet() _clrsoftintr(MIPS_SOFT_INT_MASK_1)
+#define setsoftnet() setsoft(SIR_NET)
+#define setsoftserial() setsoft(SIR_SERIAL)
/*
* nesting interrupt masks.
@@ -107,14 +122,8 @@
extern u_int intrcnt[];
/* handle i/o device interrupts */
-extern int (*mips_hardware_intr) __P((u_int, u_int, u_int, u_int));
-extern int news3400_intr __P((u_int, u_int, u_int, u_int));
-extern int news5000_intr __P((u_int, u_int, u_int, u_int));
-
-/* handle software interrupts */
-extern void (*mips_software_intr) __P((int));
-
-#define SOFTISR_ZS 0x01
+extern void news3400_intr __P((u_int, u_int, u_int, u_int));
+extern void news5000_intr __P((u_int, u_int, u_int, u_int));
extern void (*enable_intr) __P((void));
extern void (*disable_intr) __P((void));
diff -r 3d6126697c94 -r 77e51c446d91 sys/arch/newsmips/newsmips/machdep.c
--- a/sys/arch/newsmips/newsmips/machdep.c Fri Apr 14 08:36:39 2000 +0000
+++ b/sys/arch/newsmips/newsmips/machdep.c Fri Apr 14 10:11:06 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.39 2000/03/25 10:14:14 nisimura Exp $ */
+/* $NetBSD: machdep.c,v 1.40 2000/04/14 10:11:07 tsubai Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -43,7 +43,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.39 2000/03/25 10:14:14 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.40 2000/04/14 10:11:07 tsubai Exp $");
/* from: Utah Hdr: machdep.c 1.63 91/04/24 */
@@ -131,17 +131,8 @@
extern void news3400_init __P((void));
extern void news5000_init __P((void));
-/*
- * Interrupt-blocking functions defined in locore. These names aren't used
- * directly except here and in interrupt handlers.
- */
-
-/* Block out nested interrupt-enable bits. */
-extern int cpu_spl0 __P((void)), cpu_spl1 __P((void));
-extern int cpu_spl2 __P((void)), cpu_spl3 __P((void));
-extern int splhigh __P((void));
-
-void to_monitor __P((int)) __attribute__((__noreturn__));
+static void (*hardware_intr) __P((u_int, u_int, u_int, u_int));
+u_int ssir;
/*
* Local functions.
@@ -149,8 +140,11 @@
/* initialize bss, etc. from kernel start, before main() is called. */
void mach_init __P((int, int, int, int));
+
+void cpu_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t));
+
void prom_halt __P((int)) __attribute__((__noreturn__));
-static void newsmips_softintr __P((int));
+void to_monitor __P((int)) __attribute__((__noreturn__));
#ifdef DEBUG
/* stacktrace code violates prototypes to get callee's registers */
@@ -369,8 +363,7 @@
/*
* Set up interrupt handling and I/O addresses.
*/
- mips_hardware_intr = news5000_intr;
- mips_software_intr = newsmips_softintr;
+ hardware_intr = news5000_intr;
strcpy(cpu_model, "news5000");
cpuspeed = 50; /* ??? XXX */
break;
@@ -382,8 +375,7 @@
/*
* Set up interrupt handling and I/O addresses.
*/
- mips_hardware_intr = news3400_intr;
- mips_software_intr = newsmips_softintr;
+ hardware_intr = news3400_intr;
strcpy(cpu_model, "news3400");
cpuspeed = 10;
break;
@@ -672,6 +664,54 @@
DELAY(n);
}
+#include "zsc.h"
+
+int zssoft __P((void));
+
+void
+cpu_intr(status, cause, pc, ipending)
+ u_int32_t status;
+ u_int32_t cause;
+ u_int32_t pc;
+ u_int32_t ipending;
+{
+ uvmexp.intrs++;
+
+ /* device interrupts */
+ (*hardware_intr)(status, cause, pc, ipending);
+
+ /* software simulated interrupt */
+ if ((ipending & MIPS_SOFT_INT_MASK_1) ||
+ (ssir && (status & MIPS_SOFT_INT_MASK_1))) {
+
+#define DO_SIR(bit, fn) \
+ do { \
+ if (n & (bit)) { \
+ uvmexp.softs++; \
+ fn; \
+ } \
+ } while (0)
+
+ unsigned n;
+ n = ssir; ssir = 0;
+ _clrsoftintr(MIPS_SOFT_INT_MASK_1);
+
+#if NZSC > 0
+ DO_SIR(SIR_SERIAL, zssoft());
+#endif
+ DO_SIR(SIR_NET, netintr());
+#undef DO_SIR
+ }
+
+ /* 'softclock' interrupt */
+ if (ipending & MIPS_SOFT_INT_MASK_0) {
+ _clrsoftintr(MIPS_SOFT_INT_MASK_0);
+ uvmexp.softs++;
+ intrcnt[SOFTCLOCK_INTR]++;
+ softclock();
+ }
+}
+
#ifdef EXEC_ECOFF
#include <sys/exec_ecoff.h>
@@ -687,17 +727,3 @@
return 0;
}
#endif
-
-#include "zsc.h"
-
-int zssoft __P((void));
-
-void
-newsmips_softintr(sisr)
- int sisr;
-{
-#if NZSC > 0
- if (sisr & SOFTISR_ZS)
- zssoft();
-#endif
-}
diff -r 3d6126697c94 -r 77e51c446d91 sys/arch/newsmips/newsmips/news3400.c
--- a/sys/arch/newsmips/newsmips/news3400.c Fri Apr 14 08:36:39 2000 +0000
+++ b/sys/arch/newsmips/newsmips/news3400.c Fri Apr 14 10:11:06 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: news3400.c,v 1.1 1999/12/22 05:53:21 tsubai Exp $ */
+/* $NetBSD: news3400.c,v 1.2 2000/04/14 10:11:07 tsubai Exp $ */
/*-
* Copyright (C) 1999 Tsubai Masanari. All rights reserved.
@@ -28,33 +28,38 @@
#include <sys/param.h>
#include <sys/kernel.h>
+#include <sys/proc.h>
#include <sys/systm.h>
#include <machine/adrsmap.h>
#include <machine/cpu.h>
#include <machine/intr.h>
+#include <machine/psl.h>
#include <newsmips/newsmips/machid.h>
void level0_intr __P((void));
void level1_intr __P((void));
void hb_intr_dispatch __P((int));
+void MachFPInterrupt __P((unsigned, unsigned, unsigned, struct frame *));
static int badaddr_flag;
+#define INT_MASK_FPU MIPS_INT_MASK_3
+
/*
* Handle news3400 interrupts.
*/
-int
-news3400_intr(mask, pc, status, cause)
- u_int mask;
- u_int pc; /* program counter where to continue */
+void
+news3400_intr(status, cause, pc, ipending)
u_int status; /* status register at time of the exception */
u_int cause; /* cause register at time of exception */
+ u_int pc; /* program counter where to continue */
+ u_int ipending;
{
struct clockframe cf;
/* handle clock interrupts ASAP */
- if (mask & MIPS_INT_MASK_2) {
+ if (ipending & MIPS_INT_MASK_2) {
register int stat;
stat = *(volatile u_char *)INTST0;
@@ -75,32 +80,43 @@
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