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[src/netbsd-1-5]: src/sys/dev/ic Pull up rev 1.19 (approved by thorpej):
details: https://anonhg.NetBSD.org/src/rev/66b3e6fa6158
branches: netbsd-1-5
changeset: 489664:66b3e6fa6158
user: simonb <simonb%NetBSD.org@localhost>
date: Wed Oct 04 04:13:32 2000 +0000
description:
Pull up rev 1.19 (approved by thorpej):
Revert rev 1.31 of bha.c (and associtated changes in the headers and
config glue files).
Fixes PR kern/9841. Tested by Tracy J. Di Marco White with a bt948
and 6 disks.
diffstat:
sys/dev/ic/bhavar.h | 137 ++++++++++++++++++++-------------------------------
1 files changed, 53 insertions(+), 84 deletions(-)
diffs (186 lines):
diff -r 7cfdc59551f1 -r 66b3e6fa6158 sys/dev/ic/bhavar.h
--- a/sys/dev/ic/bhavar.h Wed Oct 04 04:12:50 2000 +0000
+++ b/sys/dev/ic/bhavar.h Wed Oct 04 04:13:32 2000 +0000
@@ -1,7 +1,7 @@
-/* $NetBSD: bhavar.h,v 1.18 2000/04/19 02:39:12 enami Exp $ */
+/* $NetBSD: bhavar.h,v 1.18.4.1 2000/10/04 04:13:32 simonb Exp $ */
/*-
- * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
+ * Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
@@ -39,55 +39,35 @@
#include <sys/queue.h>
-/* XXX adjust hash for large numbers of CCBs */
+/*
+ * Mail box defs etc.
+ * these could be bigger but we need the bha_softc to fit on a single page..
+ */
+#define BHA_MBX_SIZE 32 /* mail box size (MAX 255 MBxs) */
+ /* don't need that many really */
+#define BHA_CCB_MAX 32 /* store up to 32 CCBs at one time */
#define CCB_HASH_SIZE 32 /* hash table size for phystokv */
#define CCB_HASH_SHIFT 9
#define CCB_HASH(x) ((((long)(x))>>CCB_HASH_SHIFT) & (CCB_HASH_SIZE - 1))
-/*
- * A CCB allocation group. Each group is a page size. We can find
- * the allocation group for a CCB by truncating the CCB address to
- * a page boundary, and the offset from the group's DMA mapping
- * by taking the offset of the CCB into the page.
- */
-#define BHA_CCBS_PER_GROUP ((PAGE_SIZE - sizeof(bus_dmamap_t)) / \
- sizeof(struct bha_ccb))
-struct bha_ccb_group {
- bus_dmamap_t bcg_dmamap;
- struct bha_ccb bcg_ccbs[1]; /* determined at run-time */
+#define bha_nextmbx(wmb, mbx, mbio) \
+ if ((wmb) == &(mbx)->mbio[BHA_MBX_SIZE - 1]) \
+ (wmb) = &(mbx)->mbio[0]; \
+ else \
+ (wmb)++;
+
+struct bha_mbx {
+ struct bha_mbx_out mbo[BHA_MBX_SIZE];
+ struct bha_mbx_in mbi[BHA_MBX_SIZE];
+ struct bha_mbx_out *cmbo; /* Collection Mail Box out */
+ struct bha_mbx_out *tmbo; /* Target Mail Box out */
+ struct bha_mbx_in *tmbi; /* Target Mail Box in */
};
-#define BHA_CCB_GROUP(ccb) \
- (struct bha_ccb_group *)(trunc_page((vaddr_t)ccb))
-#define BHA_CCB_OFFSET(ccb) ((vaddr_t)(ccb) & PAGE_MASK)
-
-#define BHA_CCB_SYNC(sc, ccb, ops) \
-do { \
- struct bha_ccb_group *bcg = BHA_CCB_GROUP((ccb)); \
- \
- bus_dmamap_sync((sc)->sc_dmat, bcg->bcg_dmamap, \
- BHA_CCB_OFFSET(ccb), sizeof(struct bha_ccb), (ops)); \
-} while (0)
-
-/*
- * Offset in the DMA mapping for mailboxes.
- * Since all mailboxes are allocated on a single DMA'able memory
- * due to the hardware limitation, an offset of any mailboxes can be
- * calculated using same expression.
- */
-#define BHA_MBX_OFFSET(sc, mbx) ((u_long)(mbx) - (u_long)(sc)->sc_mbo)
-
-#define BHA_MBI_SYNC(sc, mbi, ops) \
-do { \
- bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap_mbox, \
- BHA_MBX_OFFSET((sc), (mbi)), sizeof(struct bha_mbx_in), (ops)); \
-} while (0)
-
-#define BHA_MBO_SYNC(sc, mbo, ops) \
-do { \
- bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap_mbox, \
- BHA_MBX_OFFSET((sc), (mbo)), sizeof(struct bha_mbx_out), (ops)); \
-} while (0)
+struct bha_control {
+ struct bha_mbx bc_mbx; /* all our mailboxes */
+ struct bha_ccb bc_ccbs[BHA_CCB_MAX]; /* all our control blocks */
+};
struct bha_softc {
struct device sc_dev;
@@ -95,50 +75,17 @@
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
bus_dma_tag_t sc_dmat;
- bus_dmamap_t sc_dmamap_mbox; /* maps the mailboxes */
+ bus_dmamap_t sc_dmamap_control; /* maps the control structures */
int sc_dmaflags; /* bus-specific dma map flags */
void *sc_ih;
- int sc_scsi_id; /* host adapter SCSI ID */
-
- int sc_flags;
-#define BHAF_WIDE 0x01 /* device is wide */
-#define BHAF_DIFFERENTIAL 0x02 /* device is differential */
-#define BHAF_ULTRA 0x04 /* device is ultra-scsi */
-#define BHAF_TAGGED_QUEUEING 0x08 /* device supports tagged queueing */
-#define BHAF_WIDE_LUN 0x10 /* device supported wide lun CCBs */
-#define BHAF_STRICT_ROUND_ROBIN 0x20 /* device supports strict RR mode */
-
- int sc_max_dmaseg; /* maximum number of DMA segments */
- int sc_hw_ccbs; /* maximum number of CCBs (HW) */
- int sc_max_ccbs; /* maximum number of CCBs (SW) */
- int sc_cur_ccbs; /* current number of CCBs */
- int sc_mbox_count; /* maximum number of mailboxes */
+ struct bha_control *sc_control; /* control structures */
- int sc_disc_mask; /* mask of targets allowing discnnct */
- int sc_ultra_mask; /* mask of targets allowing ultra */
- int sc_fast_mask; /* mask of targets allowing fast */
- int sc_sync_mask; /* mask of targets allowing sync */
- int sc_wide_mask; /* mask of targets allowing wide */
- int sc_tag_mask; /* mask of targets allowing t/q'ing */
-
- /*
- * In and Out mailboxes.
- */
- struct bha_mbx_out *sc_mbo;
- struct bha_mbx_in *sc_mbi;
-
- struct bha_mbx_out *sc_cmbo; /* Collection Mail Box out */
- struct bha_mbx_out *sc_tmbo; /* Target Mail Box out */
-
- int sc_mbofull; /* number of full Mail Box Out */
-
- struct bha_mbx_in *sc_tmbi; /* Target Mail Box in */
+#define wmbx (&sc->sc_control->bc_mbx)
struct bha_ccb *sc_ccbhash[CCB_HASH_SIZE];
- TAILQ_HEAD(, bha_ccb) sc_free_ccb,
- sc_waiting_ccb,
- sc_allocating_ccbs;
+ TAILQ_HEAD(, bha_ccb) sc_free_ccb, sc_waiting_ccb;
+ int sc_mbofull;
struct scsipi_link sc_link; /* prototype for devs */
struct scsipi_adapter sc_adapter;
@@ -148,14 +95,36 @@
sc_firmware[6];
};
+/*
+ * Offset of a Mail Box In from the beginning of the control DMA mapping.
+ */
+#define BHA_MBI_OFF(m) (offsetof(struct bha_control, bc_mbx.mbi[0]) + \
+ (((u_long)(m)) - ((u_long)&wmbx->mbi[0])))
+
+/*
+ * Offset of a Mail Box Out from the beginning of the control DMA mapping.
+ */
+#define BHA_MBO_OFF(m) (offsetof(struct bha_control, bc_mbx.mbo[0]) + \
+ (((u_long)(m)) - ((u_long)&wmbx->mbo[0])))
+
+/*
+ * Offset of a CCB from the beginning of the control DMA mapping.
+ */
+#define BHA_CCB_OFF(c) (offsetof(struct bha_control, bc_ccbs[0]) + \
+ (((u_long)(c)) - ((u_long)&sc->sc_control->bc_ccbs[0])))
+
struct bha_probe_data {
int sc_irq, sc_drq;
+ int sc_scsi_dev; /* adapters scsi id */
+ int sc_iswide; /* adapter is wide */
};
+#define ISWIDE(sc) (sc->sc_link.scsipi_scsi.max_target >= 8)
+
int bha_find __P((bus_space_tag_t, bus_space_handle_t,
struct bha_probe_data *));
void bha_attach __P((struct bha_softc *, struct bha_probe_data *));
-int bha_info __P((struct bha_softc *));
int bha_intr __P((void *));
int bha_disable_isacompat __P((struct bha_softc *));
+void bha_inquire_setup_information __P((struct bha_softc *));
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