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[src/trunk]: src/sys/arch/sparc64 PCI driver for the UltraSPARC. this only w...
details: https://anonhg.NetBSD.org/src/rev/5bf52f639deb
branches: trunk
changeset: 473441:5bf52f639deb
user: mrg <mrg%NetBSD.org@localhost>
date: Fri Jun 04 13:42:14 1999 +0000
description:
PCI driver for the UltraSPARC. this only works on the Ultra5/10 machines
(`SUNW,sabre') for now, and it doesn't really quite work there yet anyway.
the bus space/dma code is cloned from the sbus driver. the IOMMU code also
is cloned from the sbus code, but separated out into iommu.c so that we can
share it with the sbus driver. hopefully, much of the bus space/dma code
can also be re-shared with the sbus driver and the ebus driver but for now
these copies will do.
support for the real UltraSPARC PCI (`SUNW,psycho') is unwritten, though
most of this code is shared with it.
we can probe PCI config space and try to configue devices, but interrupts
don't work yet...
diffstat:
sys/arch/sparc64/dev/pci_machdep.c | 417 ++++++++++++
sys/arch/sparc64/dev/psycho.c | 480 ++++++++++++++
sys/arch/sparc64/dev/psycho_bus.c | 1038 ++++++++++++++++++++++++++++++++
sys/arch/sparc64/dev/psychoreg.h | 343 ++++++++++
sys/arch/sparc64/dev/psychovar.h | 124 +++
sys/arch/sparc64/dev/simba.c | 156 ++++
sys/arch/sparc64/dev/simbareg.h | 74 ++
sys/arch/sparc64/include/pci_machdep.h | 62 +
8 files changed, 2694 insertions(+), 0 deletions(-)
diffs (truncated from 2726 to 300 lines):
diff -r 94a2e7097cdf -r 5bf52f639deb sys/arch/sparc64/dev/pci_machdep.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/sparc64/dev/pci_machdep.c Fri Jun 04 13:42:14 1999 +0000
@@ -0,0 +1,417 @@
+/* $NetBSD: pci_machdep.c,v 1.1 1999/06/04 13:42:15 mrg Exp $ */
+
+/*
+ * Copyright (c) 1999 Matthew R. Green
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * functions expected by the MI PCI code.
+ */
+
+#undef DEBUG
+#define DEBUG
+
+#ifdef DEBUG
+#define SPDB_CONF 0x01
+#define SPDB_INTR 0x04
+#define SPDB_INTMAP 0x08
+#define SPDB_INTFIX 0x10
+int sparc_pci_debug = 0x4;
+#define DPRINTF(l, s) do { if (sparc_pci_debug & l) printf s; } while (0)
+#else
+#define DPRINTF(l, s)
+#endif
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <sys/time.h>
+#include <sys/systm.h>
+#include <sys/errno.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+
+#include <vm/vm.h>
+#include <vm/vm_kern.h>
+
+#define _SPARC_BUS_DMA_PRIVATE
+#include <machine/bus.h>
+#include <machine/autoconf.h>
+
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcireg.h>
+
+#include <sparc64/dev/iommureg.h>
+#include <sparc64/dev/iommuvar.h>
+#include <sparc64/dev/psychoreg.h>
+#include <sparc64/dev/psychovar.h>
+
+/* this is a base to be copied */
+struct sparc_pci_chipset _sparc_pci_chipset = {
+ NULL,
+};
+
+/*
+ * functions provided to the MI code.
+ */
+
+void
+pci_attach_hook(parent, self, pba)
+ struct device *parent;
+ struct device *self;
+ struct pcibus_attach_args *pba;
+{
+ pci_chipset_tag_t pc = pba->pba_pc;
+ struct psycho_pbm *pp = pc->cookie;
+ struct psycho_registers *pr;
+ pcitag_t tag;
+ char *name, *devtype;
+ u_int32_t hi, mid, lo, intr;
+ int node, i, n, *ip, *ap;
+ u_int bus, dev, fn;
+
+ DPRINTF((SPDB_INTFIX|SPDB_INTMAP), ("\npci_attach_hook:"));
+
+ /*
+ * ok, here we look in the OFW for each PCI device and fix it's
+ * "interrupt line" register to be useful.
+ */
+
+ for (node = firstchild(pc->node); node; node = nextsibling(node)) {
+ pr = NULL;
+ ip = ap = NULL;
+
+ /*
+ * ok, for each child we get the "interrupts" property,
+ * which contains a value to match against later.
+ * XXX deal with multiple "interrupts" values XXX.
+ * then we get the "assigned-addresses" property which
+ * contains, in the first entry, the PCI bus, device and
+ * function associated with this node, which we use to
+ * generate a pcitag_t to use pci_conf_read() and
+ * pci_conf_write(). next, we get the 'reg" property
+ * which is structured like the following:
+ * u_int32_t phys_hi;
+ * u_int32_t phys_mid;
+ * u_int32_t phys_lo;
+ * u_int32_t size_hi;
+ * u_int32_t size_lo;
+ * we mask these values with the "interrupt-map-mask"
+ * property of our parent and them compare with each
+ * entry in the "interrupt-map" property (also of our
+ * parent) which is structred like the following:
+ * u_int32_t phys_hi;
+ * u_int32_t phys_mid;
+ * u_int32_t phys_lo;
+ * u_int32_t intr;
+ * int32_t child_node;
+ * u_int32_t child_intr;
+ * if there is an exact match with phys_hi, phys_mid,
+ * phys_lo and the interrupt, we have a match and we
+ * know that this interrupt's value is really the
+ * child_intr of the interrupt map entry. we put this
+ * into the PCI interrupt line register so that when
+ * the driver for this node wants to attach, we know
+ * it's INO already.
+ */
+
+ name = getpropstring(node, "name");
+ DPRINTF((SPDB_INTFIX|SPDB_INTMAP), ("\n\tnode %x name `%s'", node, name));
+ devtype = getpropstring(node, "device_type");
+ DPRINTF((SPDB_INTFIX|SPDB_INTMAP), (" devtype `%s':", devtype));
+
+ /* ignore PCI bridges, we'll get them later */
+ if (strcmp(devtype, "pci") == 0)
+ continue;
+
+ /* if there isn't any "interrupts" then we don't care to fix it */
+ ip = NULL;
+ if (getprop(node, "interrupts", sizeof(int), &n, (void **)&ip))
+ continue;
+ DPRINTF(SPDB_INTFIX, (" got interrupts"));
+
+ /* and if there isn't an "assigned-addresses" we can't find b/d/f */
+ if (getprop(node, "assigned-addresses", sizeof(int), &n,
+ (void **)&ap))
+ goto clean1;
+ DPRINTF(SPDB_INTFIX, (" got assigned-addresses"));
+
+ /* ok, and now the "reg" property, so we know what we're talking about. */
+ if (getprop(node, "reg", sizeof(*pr), &n,
+ (void **)&pr))
+ goto clean2;
+ DPRINTF(SPDB_INTFIX, (" got reg"));
+
+ bus = (ap[0] >> 16) & 0xff;
+ dev = (ap[0] >> 11) & 0x1f;
+ fn = (ap[0] >> 8) & 0x7;
+
+ DPRINTF(SPDB_INTFIX, ("; bus %u dev %u fn %u", bus, dev, fn));
+
+ tag = pci_make_tag(pc, bus, dev, fn);
+
+ DPRINTF(SPDB_INTFIX, ("; tag %08x\n\t; reg: hi %x mid %x lo %x intr %x", tag, pr->phys_hi, pr->phys_mid, pr->phys_lo, *ip));
+ DPRINTF(SPDB_INTFIX, ("\n\t; intmapmask: hi %x mid %x lo %x intr %x", pp->pp_intmapmask.phys_hi, pp->pp_intmapmask.phys_mid,
+ pp->pp_intmapmask.phys_lo, pp->pp_intmapmask.intr));
+
+ hi = pr->phys_hi & pp->pp_intmapmask.phys_hi;
+ mid = pr->phys_mid & pp->pp_intmapmask.phys_mid;
+ lo = pr->phys_lo & pp->pp_intmapmask.phys_lo;
+ intr = *ip & pp->pp_intmapmask.intr;
+
+ DPRINTF(SPDB_INTFIX, ("\n\t; after: hi %x mid %x lo %x intr %x", hi, mid, lo, intr));
+
+ for (i = 0; i < pp->pp_nintmap; i++) {
+ DPRINTF(SPDB_INTFIX, ("\n\t\tmatching for: hi %x mid %x lo %x intr %x", pp->pp_intmap[i].phys_hi, pp->pp_intmap[i].phys_mid,
+ pp->pp_intmap[i].phys_lo, pp->pp_intmap[i].intr));
+
+ if (pp->pp_intmap[i].phys_hi != hi ||
+ pp->pp_intmap[i].phys_mid != mid ||
+ pp->pp_intmap[i].phys_lo != lo ||
+ pp->pp_intmap[i].intr != intr)
+ continue;
+ DPRINTF(SPDB_INTFIX, ("... BINGO! ..."));
+
+ /*
+ * OK! we found match. pull out the old interrupt
+ * register, patch in the new value, and put it back.
+ */
+ intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
+ DPRINTF(SPDB_INTFIX, ("\n\t ; read %x from intreg", intr));
+
+ intr = (intr & ~PCI_INTERRUPT_LINE_MASK) |
+ (pp->pp_intmap[i].child_intr & PCI_INTERRUPT_LINE_MASK);
+ DPRINTF((SPDB_INTFIX|SPDB_INTMAP), ("\n\t ; gonna write %x to intreg", intr));
+
+ pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
+ DPRINTF((SPDB_INTFIX|SPDB_INTMAP), ("\n\t ; reread %x from intreg", intr));
+ break;
+ }
+
+ /* clean up */
+ if (pr)
+ free(pr, M_DEVBUF);
+clean2:
+ if (ap)
+ free(ap, M_DEVBUF);
+clean1:
+ if (ip)
+ free(ip, M_DEVBUF);
+ }
+ DPRINTF(SPDB_INTFIX, ("\n"));
+}
+
+int
+pci_bus_maxdevs(pc, busno)
+ pci_chipset_tag_t pc;
+ int busno;
+{
+
+ return 32;
+}
+
+pcitag_t
+pci_make_tag(pc, b, d, f)
+ pci_chipset_tag_t pc;
+ int b;
+ int d;
+ int f;
+{
+
+ return (b << 16) | (d << 11) | (f << 8);
+}
+
+static int confaddr_ok __P((struct psycho_softc *, pcitag_t));
+
+/*
+ * this function is a large hack. ideally, we should also trap accesses
+ * properly, but we have to avoid letting anything read various parts
+ * of bus 0 dev 0 fn 0 space or the machine may hang. so, even if we
+ * do properly implement PCI config access trap handling, this function
+ * should remain in place Just In Case.
+ */
+static int
+confaddr_ok(sc, tag)
+ struct psycho_softc *sc;
+ pcitag_t tag;
+{
+ int bus, dev, fn;
+
+ bus = (tag >> 16) & 0xff;
+ dev = (tag >> 11) & 0x1f;
+ fn = (tag >> 8) & 0x7;
+
+ if (sc->sc_mode == PSYCHO_MODE_SABRE) {
+ /*
+ * bus 0 is only ok for dev 0 fn 0, dev 1 fn 0 and dev fn 1.
+ */
+ if (bus == 0 &&
+ ((dev == 0 && fn > 0) ||
+ (dev == 1 && fn > 1) ||
+ (dev > 1))) {
+ DPRINTF(SPDB_CONF, (" confaddr_ok: rejecting bus %d dev %d fn %d -", bus, dev, fn));
+ return (0);
+ }
+ } else if (sc->sc_mode == PSYCHO_MODE_PSYCHO_A ||
+ sc->sc_mode == PSYCHO_MODE_PSYCHO_B) {
+ /*
+ * make sure we are reading our own bus
+ */
+ /* XXX??? */
+ }
+ return (1);
+}
+
+/* assume we are mapped little-endian/side-effect */
+pcireg_t
+pci_conf_read(pc, tag, reg)
+ pci_chipset_tag_t pc;
+ pcitag_t tag;
+ int reg;
+{
+ struct psycho_pbm *pp = pc->cookie;
+ struct psycho_softc *sc = pp->pp_sc;
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