Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/dev/qbus The DHU code changed to use bus_space.
details: https://anonhg.NetBSD.org/src/rev/d3512a79105a
branches: trunk
changeset: 473306:d3512a79105a
user: ragge <ragge%NetBSD.org@localhost>
date: Fri May 28 20:17:29 1999 +0000
description:
The DHU code changed to use bus_space.
XXX - still need to use bus_dma.
diffstat:
sys/dev/qbus/dhu.c | 129 ++++++++++++++++++++++++-------------------------
sys/dev/qbus/dhureg.h | 15 +++++-
2 files changed, 77 insertions(+), 67 deletions(-)
diffs (truncated from 413 to 300 lines):
diff -r 68a1cc7b90ef -r d3512a79105a sys/dev/qbus/dhu.c
--- a/sys/dev/qbus/dhu.c Fri May 28 19:40:09 1999 +0000
+++ b/sys/dev/qbus/dhu.c Fri May 28 20:17:29 1999 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: dhu.c,v 1.14 1999/05/28 18:56:41 ragge Exp $ */
+/* $NetBSD: dhu.c,v 1.15 1999/05/28 20:17:29 ragge Exp $ */
/*
* Copyright (c) 1996 Ken C. Wellsch. All rights reserved.
* Copyright (c) 1992, 1993
@@ -50,11 +50,14 @@
#include <sys/syslog.h>
#include <sys/device.h>
-#include <machine/trap.h>
+#include <machine/bus.h>
#include <machine/scb.h>
-#include <vax/uba/ubavar.h>
-#include <vax/uba/dhureg.h>
+#include <dev/qbus/ubavar.h>
+
+#include <dev/qbus/dhureg.h>
+
+#include "ioconf.h"
/* A DHU-11 has 16 ports while a DHV-11 has only 8. We use 16 by default */
@@ -65,8 +68,9 @@
struct dhu_softc {
struct device sc_dev; /* Device struct used by config */
- dhuregs * sc_addr; /* controller reg address */
int sc_type; /* controller type, DHU or DHV */
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
struct {
struct tty *dhu_tty; /* what we work on */
int dhu_state; /* to manage TX output status */
@@ -94,6 +98,16 @@
#define DML_DSR TIOCM_DSR
#define DML_BRK 0100000 /* no equivalent, we will mask */
+#define DHU_READ_WORD(reg) \
+ bus_space_read_2(sc->sc_iot, sc->sc_ioh, reg)
+#define DHU_WRITE_WORD(reg, val) \
+ bus_space_write_2(sc->sc_iot, sc->sc_ioh, reg, val)
+#define DHU_READ_BYTE(reg) \
+ bus_space_read_1(sc->sc_iot, sc->sc_ioh, reg)
+#define DHU_WRITE_BYTE(reg, val) \
+ bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val)
+
+
/* On a stock DHV, channel pairs (0/1, 2/3, etc.) must use */
/* a baud rate from the same group. So limiting to B is likely */
/* best, although clone boards like the ABLE QHV allow all settings. */
@@ -139,8 +153,6 @@
sizeof(struct dhu_softc), dhu_match, dhu_attach
};
-extern struct cfdriver dhu_cd;
-
/* Autoconfig handles: setup the controller to interrupt, */
/* then complete the housecleaning for full operation */
@@ -151,21 +163,20 @@
void *aux;
{
struct uba_attach_args *ua = aux;
- register dhuregs *dhuaddr;
register int n;
- dhuaddr = (dhuregs *) ua->ua_addr;
-
/* Reset controller to initialize, enable TX/RX interrupts */
/* to catch floating vector info elsewhere when completed */
- dhuaddr->dhu_csr = (DHU_CSR_MASTER_RESET | DHU_CSR_RXIE | DHU_CSR_TXIE);
+ bus_space_write_2(ua->ua_iot, ua->ua_ioh, DHU_UBA_CSR,
+ DHU_CSR_MASTER_RESET | DHU_CSR_RXIE | DHU_CSR_TXIE);
/* Now wait up to 3 seconds for self-test to complete. */
for (n = 0; n < 300; n++) {
DELAY(10000);
- if ((dhuaddr->dhu_csr & DHU_CSR_MASTER_RESET) == 0)
+ if ((bus_space_read_2(ua->ua_iot, ua->ua_ioh, DHU_UBA_CSR) &
+ DHU_CSR_MASTER_RESET) == 0)
break;
}
@@ -177,7 +188,8 @@
/* Check whether diagnostic run has signalled a failure. */
- if ((dhuaddr->dhu_csr & DHU_CSR_DIAG_FAIL) != 0)
+ if ((bus_space_read_2(ua->ua_iot, ua->ua_ioh, DHU_UBA_CSR) &
+ DHU_CSR_DIAG_FAIL) != 0)
return 0;
/* Register the RX interrupt handler */
@@ -194,18 +206,17 @@
{
register struct dhu_softc *sc = (void *)self;
register struct uba_attach_args *ua = aux;
- register dhuregs *dhuaddr;
register unsigned c;
register int n;
- dhuaddr = (dhuregs *) ua->ua_addr;
-
+ sc->sc_iot = ua->ua_iot;
+ sc->sc_ioh = ua->ua_ioh;
/* Process the 8 bytes of diagnostic info put into */
/* the FIFO following the master reset operation. */
printf("\n%s:", self->dv_xname);
for (n = 0; n < 8; n++) {
- c = dhuaddr->dhu_rbuf;
+ c = DHU_READ_WORD(DHU_UBA_RBUF);
if ((c&DHU_DIAG_CODE) == DHU_DIAG_CODE) {
if ((c&0200) == 0000)
@@ -216,12 +227,11 @@
((c>>1)&01), ((c>>2)&07));
}
}
- printf("\n");
+
+ c = DHU_READ_WORD(DHU_UBA_STAT);
- c = dhuaddr->dhu_stat; /* get flag to distinguish DHU from DHV */
-
- sc->sc_addr = dhuaddr;
sc->sc_type = (c & DHU_STAT_DHU)? IS_DHU: IS_DHV;
+ printf("\n%s: DH%s-11\n", self->dv_xname, (c & DHU_STAT_DHU)?"U":"V");
/* Now stuff TX interrupt handler in place */
scb_vecalloc(ua->ua_cvec + 4, dhuxint, self->dv_unit, SCB_ISTACK);
@@ -234,15 +244,12 @@
int unit;
{
struct dhu_softc *sc = dhu_cd.cd_devs[unit];
- register dhuregs *dhuaddr;
register struct tty *tp;
register int cc, line;
register unsigned c, delta;
int overrun = 0;
- dhuaddr = sc->sc_addr;
-
- while ((c = dhuaddr->dhu_rbuf) & DHU_RBUF_DATA_VALID) {
+ while ((c = DHU_READ_WORD(DHU_UBA_RBUF)) & DHU_RBUF_DATA_VALID) {
/* Ignore diagnostic FIFO entries. */
@@ -301,7 +308,6 @@
(*linesw[tp->t_line].l_rint)(cc, tp);
}
- return;
}
/* Transmitter Interrupt */
@@ -311,13 +317,10 @@
int unit;
{
register struct dhu_softc *sc = dhu_cd.cd_devs[unit];
- register dhuregs *dhuaddr;
register struct tty *tp;
register int line;
- dhuaddr = sc->sc_addr;
-
- line = DHU_LINE(dhuaddr->dhu_csr_hi);
+ line = DHU_LINE(DHU_READ_BYTE(DHU_UBA_CSR_HI));
tp = sc->sc_dhu[line].dhu_tty;
@@ -326,7 +329,8 @@
tp->t_state &= ~TS_FLUSH;
else {
if (sc->sc_dhu[line].dhu_state == STATE_DMA_STOPPED)
- sc->sc_dhu[line].dhu_cc -= dhuaddr->dhu_tbufcnt;
+ sc->sc_dhu[line].dhu_cc -=
+ DHU_READ_WORD(DHU_UBA_TBUFCNT);
ndflush(&tp->t_outq, sc->sc_dhu[line].dhu_cc);
sc->sc_dhu[line].dhu_cc = 0;
}
@@ -337,8 +341,6 @@
(*linesw[tp->t_line].l_start)(tp);
else
dhustart(tp);
-
- return;
}
int
@@ -347,7 +349,6 @@
int flag, mode;
struct proc *p;
{
- register dhuregs *dhuaddr;
register struct tty *tp;
register int unit, line;
struct dhu_softc *sc;
@@ -377,11 +378,9 @@
uballoc((struct uba_softc *)sc->sc_dev.dv_parent,
tp->t_outq.c_cs, tp->t_outq.c_cn, 0);
- dhuaddr = sc->sc_addr;
-
s = spltty();
- dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | line);
- sc->sc_dhu[line].dhu_modem = dhuaddr->dhu_stat;
+ DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line);
+ sc->sc_dhu[line].dhu_modem = DHU_READ_WORD(DHU_UBA_STAT);
(void) splx(s);
}
@@ -563,7 +562,6 @@
register struct tty *tp;
{
register struct dhu_softc *sc;
- register dhuregs *dhuaddr;
register int line;
int s;
@@ -578,9 +576,10 @@
sc->sc_dhu[line].dhu_state = STATE_DMA_STOPPED;
- dhuaddr = sc->sc_addr;
- dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | line);
- dhuaddr->dhu_lnctrl |= DHU_LNCTRL_DMA_ABORT;
+ DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line);
+ DHU_WRITE_WORD(DHU_UBA_LNCTRL,
+ DHU_READ_WORD(DHU_UBA_LNCTRL) |
+ DHU_LNCTRL_DMA_ABORT);
}
if (!(tp->t_state & TS_TTSTOP))
@@ -594,7 +593,6 @@
register struct tty *tp;
{
register struct dhu_softc *sc;
- register dhuregs *dhuaddr;
register int line, cc;
register int addr;
int s;
@@ -621,15 +619,16 @@
line = DHU_LINE(minor(tp->t_dev));
- dhuaddr = sc->sc_addr;
- dhuaddr->dhu_csr_lo = (DHU_CSR_RXIE | line);
+ DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line);
sc->sc_dhu[line].dhu_cc = cc;
if (cc == 1) {
sc->sc_dhu[line].dhu_state = STATE_TX_ONE_CHAR;
- dhuaddr->dhu_txchar = DHU_TXCHAR_DATA_VALID | *tp->t_outq.c_cf;
+
+ DHU_WRITE_WORD(DHU_UBA_TXCHAR,
+ DHU_TXCHAR_DATA_VALID | *tp->t_outq.c_cf);
} else {
@@ -638,13 +637,14 @@
addr = UBAI_ADDR(sc->sc_dhu[line].dhu_txaddr) +
(tp->t_outq.c_cf - tp->t_outq.c_cs);
- dhuaddr->dhu_tbufcnt = cc;
- dhuaddr->dhu_tbufad1 = (addr & 0xFFFF);
- dhuaddr->dhu_tbufad2 = ((addr>>16) & 0x3F) |
- DHU_TBUFAD2_TX_ENABLE;
-
- dhuaddr->dhu_lnctrl &= ~DHU_LNCTRL_DMA_ABORT;
- dhuaddr->dhu_tbufad2 |= DHU_TBUFAD2_DMA_START;
+ DHU_WRITE_WORD(DHU_UBA_TBUFCNT, cc);
+ DHU_WRITE_WORD(DHU_UBA_TBUFAD1, addr & 0xFFFF);
+ DHU_WRITE_WORD(DHU_UBA_TBUFAD2, ((addr>>16) & 0x3F) |
+ DHU_TBUFAD2_TX_ENABLE);
+ DHU_WRITE_WORD(DHU_UBA_LNCTRL,
+ DHU_READ_WORD(DHU_UBA_LNCTRL) & ~DHU_LNCTRL_DMA_ABORT);
+ DHU_WRITE_WORD(DHU_UBA_TBUFAD2,
+ DHU_READ_WORD(DHU_UBA_TBUFAD2) | DHU_TBUFAD2_DMA_START);
}
out:
(void) splx(s);
@@ -657,7 +657,6 @@
register struct termios *t;
{
struct dhu_softc *sc;
- register dhuregs *dhuaddr;
register int cflag = t->c_cflag;
int ispeed = ttspeedtab(t->c_ispeed, dhuspeedtab);
int ospeed = ttspeedtab(t->c_ospeed, dhuspeedtab);
@@ -684,8 +683,7 @@
Home |
Main Index |
Thread Index |
Old Index