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[src/trunk]: src/sys/dev/mii Define OUIs in a more uniform way. OUIs are fixe...



details:   https://anonhg.NetBSD.org/src/rev/ec579f04fc59
branches:  trunk
changeset: 472960:ec579f04fc59
user:      drochner <drochner%NetBSD.org@localhost>
date:      Fri May 14 11:37:30 1999 +0000

description:
Define OUIs in a more uniform way. OUIs are fixed entities registered
with IEEE, so use the "real" OUIs for definitions.
Now unfortunately vendors differ in how the MII ID register bits are
used wrt bit and byte ordering. There is a straightforward way - bits
numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used
by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count
the bits as they appear on the wire, and some differ completely.
Account for these cases by "xx" prefixed OUI definitions which compensate
for this, so the MII_OUI() macro can still be used.
Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.

diffstat:

 sys/dev/mii/miidevs |  63 +++++++++++++++++++++++++++++++++++++---------------
 1 files changed, 45 insertions(+), 18 deletions(-)

diffs (105 lines):

diff -r 818432b3ce9a -r ec579f04fc59 sys/dev/mii/miidevs
--- a/sys/dev/mii/miidevs       Fri May 14 07:07:16 1999 +0000
+++ b/sys/dev/mii/miidevs       Fri May 14 11:37:30 1999 +0000
@@ -1,4 +1,4 @@
-$NetBSD: miidevs,v 1.5 1999/03/24 21:07:04 thorpej Exp $
+$NetBSD: miidevs,v 1.6 1999/05/14 11:37:30 drochner Exp $
 
 /*-
  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
@@ -38,38 +38,65 @@
  */
 
 /*
- * List of known MII OUIs
+ * List of known MII OUIs.
+ * For a complete list see http://standards.ieee.org/regauth/oui/
+ *
+ * XXX Vendors do obviously not agree how OUIs (18 bit) are mapped
+ * to the 16 bits available in the id registers. The MII_OUI() macro
+ * in "mii.h" reflects the most obvious way. If a vendor uses a
+ * different mapping, an "xx" prefixed OUI is defined here which is
+ * mangled accordingly to compensate.
  */
 
-oui AMD                                0x00606e        Advanced Micro Devices
-oui DAVICOM                    0x006040        Davicom Semiconductor
-oui ICS                                0x00057d        Integrated Circuit Systems
+oui AMD                                0x00001a        Advanced Micro Devices
+oui DAVICOM                    0x00606e        Davicom Semiconductor
+oui ICS                                0x00a0be        Integrated Circuit Systems
 oui INTEL                      0x00aa00        Intel
-oui LEVEL1                     0x1e0400        Level 1
+oui LEVEL1                     0x00207b        Level 1
 oui NATSEMI                    0x080017        National Semiconductor
 oui QUALSEMI                   0x006051        Quality Semiconductor
-oui SEEQ                       0x0005be        Seeq
-oui SIS                                0x000760        Silicon Integrated Systems
-oui TI                         0x100014        Texas Instruments
+oui SEEQ                       0x00a07d        Seeq
+oui SIS                                0x00e006        Silicon Integrated Systems
+oui TI                         0x080028        Texas Instruments
+
+
+/* in the 79c873, AMD uses another OUI (which matches Davicom!) */
+oui xxAMD                      0x00606e        Advanced Micro Devices
+
+/* some vendors have the bits swapped within bytes
+       (ie, ordered as on the wire) */
+oui xxICS                      0x00057d        Integrated Circuit Systems
+oui xxSEEQ                     0x0005be        Seeq
+oui xxSIS                      0x000760        Silicon Integrated Systems
+oui xxTI                       0x100014        Texas Instruments
+
+/* Level 1 is completely different - from right to left.
+       (Two bits get lost in the third OUI byte.) */
+oui xxLEVEL1                   0x1e0400        Level 1
+
+/* Don't know what's going on here. */
+oui xxDAVICOM                  0x006040        Davicom Semiconductor
+
 
 /*
  * List of known models.  Grouped by oui.
  */
 
 /* Advanced Micro Devices PHYs */
-model AMD 79C873               0x0000 Am79C873 10/100 media interface
+model xxAMD 79C873             0x0000 Am79C873 10/100 media interface
+model AMD 79c973phy            0x0036 Am79c973 internal PHY
 
 /* Davicom Semiconductor PHYs */
-model DAVICOM DM9101           0x0000 DM9101 10/100 media interface
+model xxDAVICOM DM9101         0x0000 DM9101 10/100 media interface
 
 /* Integrated Circuit Systems PHYs */
-model ICS 1890                 0x0002 ICS1890 10/100 media interface
+model xxICS 1890               0x0002 ICS1890 10/100 media interface
 
 /* Intel PHYs */
 model INTEL I82555             0x0015 i82555 10/100 media interface
 
 /* Level 1 PHYs */
-model LEVEL1 LXT970            0x0000 LXT970 10/100 media interface
+model xxLEVEL1 LXT970          0x0000 LXT970 10/100 media interface
 
 /* National Semiconductor PHYs */
 model NATSEMI DP83840          0x0000 DP83840 10/100 media interface
@@ -79,12 +106,12 @@
 model QUALSEMI QS6612          0x0000 QS6612 10/100 media interface
 
 /* Seeq PHYs */
-model SEEQ 80220               0x0003 Seeq 80220 10/100 media interface
-model SEEQ 84220               0x0004 Seeq 84220 10/100 media interface
+model xxSEEQ 80220             0x0003 Seeq 80220 10/100 media interface
+model xxSEEQ 84220             0x0004 Seeq 84220 10/100 media interface
 
 /* Silicon Integrated Systems PHYs */
-model SIS 900                  0x0000 SiS 900 10/100 media interface
+model xxSIS 900                        0x0000 SiS 900 10/100 media interface
 
 /* Texas Instruments PHYs */
-model TI TLAN10T               0x0001 ThunderLAN 10baseT media interface
-model TI 100VGPMI              0x0002 ThunderLAN 100VG-AnyLan media interface
+model xxTI TLAN10T             0x0001 ThunderLAN 10baseT media interface
+model xxTI 100VGPMI            0x0002 ThunderLAN 100VG-AnyLan media interface



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