[src/trunk]: src/sys/arch/sparc64/include Add some more 32-bit emulation supp...

[eeh <eeh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/8e82e4daba61
branches:  trunk
changeset: 472915:8e82e4daba61
user:      eeh <eeh%NetBSD.org@localhost>
date:      Wed May 12 01:11:54 1999 +0000

description:
Add some more 32-bit emulation support.

diffstat:

 sys/arch/sparc64/include/reg.h |  13 +++++++++++--
 1 files changed, 11 insertions(+), 2 deletions(-)

diffs (32 lines):

diff -r 7f1e0bfb250d -r 8e82e4daba61 sys/arch/sparc64/include/reg.h
--- a/sys/arch/sparc64/include/reg.h    Wed May 12 00:38:20 1999 +0000
+++ b/sys/arch/sparc64/include/reg.h    Wed May 12 01:11:54 1999 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: reg.h,v 1.1.1.1 1998/06/20 04:58:52 eeh Exp $ */
+/*     $NetBSD: reg.h,v 1.2 1999/05/12 01:11:54 eeh Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -132,7 +132,6 @@
        int64_t r_tstate;       /* tstate register */
        int64_t r_pc;           /* return pc */
        int64_t r_npc;          /* return npc */
-       char    r_tl;           /* trap level register -- 3 bits */
        int     r_y;            /* %y register -- 32-bits */
        int64_t r_global[8];    /* global registers in trap's caller */
        int64_t r_out[8];       /* output registers in trap's caller */
@@ -173,4 +172,14 @@
        struct  fp_qentry fr_queue[FP_QSIZE];   /* queue contents */
 };
 
+/*
+ * 32-bit fpreg used by 32-bit sparc CPUs
+ */
+struct fpreg32 {
+       u_int   fr_regs[32];            /* our view is 32 32-bit registers */
+       int     fr_fsr;                 /* %fsr */
+       int     fr_qsize;               /* actual queue depth */
+       struct  fp_qentry fr_queue[FP_QSIZE];   /* queue contents */
+};
+
 #endif /* _MACHINE_REG_H_ */