[src/trunk]: src/sys/dev/pci Read the board revision and trim cache line size...

[mjacob <mjacob%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/eccc26e4aefb
branches:  trunk
changeset: 471526:eccc26e4aefb
user:      mjacob <mjacob%NetBSD.org@localhost>
date:      Sun Apr 04 01:14:58 1999 +0000

description:
Read the board revision and trim cache line size back from 16 to 1
for early revision 2100 boards. Make sure to turn ROM off for these
boards.

diffstat:

 sys/dev/pci/isp_pci.c |  31 +++++++++++++++++++++++++------
 1 files changed, 25 insertions(+), 6 deletions(-)

diffs (72 lines):

diff -r 8974797ee782 -r eccc26e4aefb sys/dev/pci/isp_pci.c
--- a/sys/dev/pci/isp_pci.c     Sun Apr 04 00:21:53 1999 +0000
+++ b/sys/dev/pci/isp_pci.c     Sun Apr 04 01:14:58 1999 +0000
@@ -1,5 +1,5 @@
-/* $NetBSD: isp_pci.c,v 1.38 1999/03/27 01:08:59 mjacob Exp $ */
-/* release_03_25_99 */
+/* $NetBSD: isp_pci.c,v 1.39 1999/04/04 01:14:58 mjacob Exp $ */
+/* release_4_3_99 */
 /*
  * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
  *
@@ -147,6 +147,10 @@
 
 #define IO_MAP_REG     0x10
 #define MEM_MAP_REG    0x14
+#define        PCIR_ROMADDR    0x30
+
+#define        PCI_DFLT_LTNCY  0x40
+#define        PCI_DFLT_LNSZ   0x10
 
 
 static int isp_pci_probe __P((struct device *, struct cfdata *, void *));
@@ -208,7 +212,7 @@
 #ifdef DEBUG
        static char oneshot = 1;
 #endif
-       u_int32_t data;
+       u_int32_t data, linesz = PCI_DFLT_LNSZ;
        struct pci_attach_args *pa = aux;
        struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) self;
        struct ispsoftc *isp = &pcs->pci_isp;
@@ -290,6 +294,16 @@
                bzero(isp->isp_param, sizeof (fcparam));
                pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] =
                    PCI_MBOX_REGS2100_OFF;
+               data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG);
+               if ((data & 0xff) < 3) {
+                       /*
+                        * XXX: Need to get the actual revision
+                        * XXX: number of the 2100 FB. At any rate,
+                        * XXX: lower cache line size for early revision
+                        * XXX; boards.
+                        */
+                       linesz = 1;
+               }
        }
 #endif
 
@@ -307,15 +321,20 @@
        pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, data);
 
        /*
-        * Make sure that latency timer and cache line size is set sanely.
+        * Make sure that the latency timer, cache line size,
+        * and ROM is disabled.
         */
        data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
        data &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
        data &= ~(PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT);
-       data |= (0x40 << PCI_LATTIMER_SHIFT);
-       data |= (0x10 << PCI_CACHELINE_SHIFT);
+       data |= (PCI_DFLT_LTNCY << PCI_LATTIMER_SHIFT);
+       data |= (linesz << PCI_CACHELINE_SHIFT);
        pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, data);
 
+       data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCIR_ROMADDR);
+       data &= ~1;
+       pci_conf_write(pa->pa_pc, pa->pa_tag, PCIR_ROMADDR, data);
+
 #ifdef DEBUG
        if (oneshot) {
                oneshot = 0;