[src/netbsd-1-4]: src/sys/dev/pci Pull up revisions 1.82-1.83 (requested by b...

[he <he%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c046a025a7d4
branches:  netbsd-1-4
changeset: 470852:c046a025a7d4
user:      he <he%NetBSD.org@localhost>
date:      Mon Aug 14 14:15:21 2000 +0000

description:
Pull up revisions 1.82-1.83 (requested by bouyer):
  Add UltraDMA support for the CMD PCI0646U and PCI0646U2 controllers;
  normally disabled on PCI0646U due to a chip bug, but can be
  enabled with a kernel option.

diffstat:

 sys/dev/pci/pciide.c |  34 +++++++++++++++++++++++++++++-----
 1 files changed, 29 insertions(+), 5 deletions(-)

diffs (89 lines):

diff -r 84d10cb9d5ab -r c046a025a7d4 sys/dev/pci/pciide.c
--- a/sys/dev/pci/pciide.c      Mon Aug 14 14:14:45 2000 +0000
+++ b/sys/dev/pci/pciide.c      Mon Aug 14 14:15:21 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pciide.c,v 1.33.2.9 2000/07/27 17:45:09 he Exp $       */
+/*     $NetBSD: pciide.c,v 1.33.2.10 2000/08/14 14:15:21 he Exp $      */
 
 
 /*
@@ -2167,6 +2167,8 @@
 {       
        struct pciide_channel *cp;
        int channel;
+       int rev = PCI_REVISION(
+           pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CLASS_REG));
 
        /*
         * For a CMD PCI064x, the use of PCI_COMMAND_IO_ENABLE
@@ -2195,7 +2197,28 @@
                case PCI_PRODUCT_CMDTECH_648:
                        sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
                        sc->sc_wdcdev.UDMA_cap = 4;
+                       sc->sc_wdcdev.irqack = cmd646_9_irqack;
+                       break;
                case PCI_PRODUCT_CMDTECH_646:
+                       if (rev >= CMD0646U2_REV) {
+                               sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
+                               sc->sc_wdcdev.UDMA_cap = 2;
+                       } else if (rev >= CMD0646U_REV) {
+                       /*
+                        * Linux's driver claims that the 646U is broken
+                        * with UDMA. Only enable it if we know what we're
+                        * doing
+                        */
+#ifdef PCIIDE_CMD0646U_UDMA
+                               sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
+                               sc->sc_wdcdev.UDMA_cap = 2;
+#endif
+                               /* explicitely disable UDMA */
+                               pciide_pci_write(sc->sc_pc, sc->sc_tag,
+                                   CMD_UDMATIM(0), 0);
+                               pciide_pci_write(sc->sc_pc, sc->sc_tag,
+                                   CMD_UDMATIM(1), 0);
+                       }
                        sc->sc_wdcdev.irqack = cmd646_9_irqack;
                        break;
                default:
@@ -2221,6 +2244,7 @@
                        continue;
                cmd0643_9_setup_channel(&cp->wdc_channel);
        }
+       /* note - this also make sure we clear the irq disable and reset bits */
        pciide_pci_write(sc->sc_pc, sc->sc_tag, CMD_DMA_MODE, CMD_DMA_MULTIPLE);
        WDCDEBUG_PRINT(("cmd0643_9_chip_map: timings reg now 0x%x 0x%x\n",
            pci_conf_read(sc->sc_pc, sc->sc_tag, 0x54),
@@ -2252,7 +2276,7 @@
                tim = cmd0643_9_data_tim_pio[drvp->PIO_mode];
                if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
                        if (drvp->drive_flags & DRIVE_UDMA) {
-                               /* UltraDMA on a 0648 or 0649 */
+                               /* UltraDMA on a 646U2, 0648 or 0649 */
                                udma_reg = pciide_pci_read(sc->sc_pc,
                                    sc->sc_tag, CMD_UDMATIM(chp->channel));
                                if (drvp->UDMA_mode > 2 &&
@@ -2262,13 +2286,13 @@
                                        drvp->UDMA_mode = 2;
                                if (drvp->UDMA_mode > 2)
                                        udma_reg &= ~CMD_UDMATIM_UDMA33(drive);
-                               else
+                               else if (sc->sc_wdcdev.UDMA_cap > 2) 
                                        udma_reg |= CMD_UDMATIM_UDMA33(drive);
                                udma_reg |= CMD_UDMATIM_UDMA(drive);
                                udma_reg &= ~(CMD_UDMATIM_TIM_MASK <<
                                    CMD_UDMATIM_TIM_OFF(drive));
                                udma_reg |=
-                                   (cmd0648_9_tim_udma[drvp->UDMA_mode] <<
+                                   (cmd0646_9_tim_udma[drvp->UDMA_mode] <<
                                    CMD_UDMATIM_TIM_OFF(drive));
                                pciide_pci_write(sc->sc_pc, sc->sc_tag,
                                    CMD_UDMATIM(chp->channel), udma_reg);
@@ -2277,7 +2301,7 @@
                                 * use Multiword DMA.
                                 * Timings will be used for both PIO and DMA,
                                 * so adjust DMA mode if needed
-                                * if we have a 0648/9, turn off UDMA
+                                * if we have a 0646U2/8/9, turn off UDMA
                                 */
                                if (sc->sc_wdcdev.cap & WDC_CAPABILITY_UDMA) {
                                        udma_reg = pciide_pci_read(sc->sc_pc,