[src/trunk]: src/gnu/dist/gas/config Revert handling of divide and remainder ...

[jonathan <jonathan%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/b3bda9a0ce06
branches:  trunk
changeset: 467955:b3bda9a0ce06
user:      jonathan <jonathan%NetBSD.org@localhost>
date:      Wed Mar 31 18:01:31 1999 +0000

description:
Revert handling of divide and remainder assembler pseudo-ops (with
test for divide-by-zero, unlike machine insn) from the binutils-2.9.1
sequence to the older binutils-2.8.1 sequence.

gas 2.8.1 emits a div as (in pseudocode)
        divu $zer0o, a0, v0; bnez $v0, 1f; nop; break0x7; 1: mflo a0;

gas 2.9.1 emits the shorter sequence
        bnez <divisor>, 1f; divu <args>; break0x7;  1:
         bnez $v0, 1f;  divu $zer0o, a0, v0; /break0x7; 1: mflo a0;

but that on a decstation 5000/150 with a rev 3.0 r4000, for kernel
code, later references to $a0 seem to get a corrupted value.  not
reproduced yet on an r4400.
Could be an r4000-specific bug with the interlock on mulhi and mullo?

diffstat:

 gnu/dist/gas/config/tc-mips.c |  21 ++++++++++-----------
 1 files changed, 10 insertions(+), 11 deletions(-)

diffs (58 lines):

diff -r c62edb96b5a7 -r b3bda9a0ce06 gnu/dist/gas/config/tc-mips.c
--- a/gnu/dist/gas/config/tc-mips.c     Wed Mar 31 16:12:51 1999 +0000
+++ b/gnu/dist/gas/config/tc-mips.c     Wed Mar 31 18:01:31 1999 +0000
@@ -3294,6 +3294,9 @@
  * mips assembler simply uses register $zero. Just one tiny optimization
  * we're missing.
  */
+         
+/* XXX rever to binutils 2.8.1 version, r4000 kernel weirdness. */
+
 static void
 macro (ip)
      struct mips_cl_insn *ip;
@@ -3821,20 +3824,16 @@
       mips_emit_delays (true);
       ++mips_opts.noreorder;
       mips_any_noreorder = 1;
+      macro_build ((char *) NULL, &icnt, NULL,
+                  dbl ? "ddiv" : "div",
+                  "z,s,t", sreg, treg);
       if (mips_trap)
-       {
-         macro_build ((char *) NULL, &icnt, NULL, "teq", "s,t", treg, 0);
-         macro_build ((char *) NULL, &icnt, NULL,
-                      dbl ? "ddiv" : "div",
-                      "z,s,t", sreg, treg);
-       }
+       macro_build ((char *) NULL, &icnt, NULL, "teq", "s,t", treg, 0);
       else
        {
          expr1.X_add_number = 8;
          macro_build ((char *) NULL, &icnt, &expr1, "bne", "s,t,p", treg, 0);
-         macro_build ((char *) NULL, &icnt, NULL,
-                      dbl ? "ddiv" : "div",
-                      "z,s,t", sreg, treg);
+         macro_build ((char *) NULL, &icnt, NULL, "nop", "", 0);
          macro_build ((char *) NULL, &icnt, NULL, "break", "c", 7);
        }
       expr1.X_add_number = -1;
@@ -3966,16 +3965,16 @@
       mips_emit_delays (true);
       ++mips_opts.noreorder;
       mips_any_noreorder = 1;
+      macro_build ((char *) NULL, &icnt, NULL, s, "z,s,t", sreg, treg);
       if (mips_trap)
        {
          macro_build ((char *) NULL, &icnt, NULL, "teq", "s,t", treg, 0);
-         macro_build ((char *) NULL, &icnt, NULL, s, "z,s,t", sreg, treg);
        }
       else
        {
          expr1.X_add_number = 8;
          macro_build ((char *) NULL, &icnt, &expr1, "bne", "s,t,p", treg, 0);
-         macro_build ((char *) NULL, &icnt, NULL, s, "z,s,t", sreg, treg);
+         macro_build ((char *) NULL, &icnt, NULL, "nop", "", 0);
          macro_build ((char *) NULL, &icnt, NULL, "break", "c", 7);
        }
       --mips_opts.noreorder;