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[src/trunk]: src/sys/arch/sparc64/sparc64 Fix ref counting.



details:   https://anonhg.NetBSD.org/src/rev/e5c11b9a745b
branches:  trunk
changeset: 467741:e5c11b9a745b
user:      eeh <eeh%NetBSD.org@localhost>
date:      Sun Mar 28 16:01:19 1999 +0000

description:
Fix ref counting.

diffstat:

 sys/arch/sparc64/sparc64/machdep.c |   4 +-
 sys/arch/sparc64/sparc64/pmap.c    |  41 +++++++++++++++++++++++++++++++++++++-
 sys/arch/sparc64/sparc64/trap.c    |   5 +++-
 3 files changed, 46 insertions(+), 4 deletions(-)

diffs (110 lines):

diff -r 8f109773b731 -r e5c11b9a745b sys/arch/sparc64/sparc64/machdep.c
--- a/sys/arch/sparc64/sparc64/machdep.c        Sun Mar 28 14:03:36 1999 +0000
+++ b/sys/arch/sparc64/sparc64/machdep.c        Sun Mar 28 16:01:19 1999 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.c,v 1.33 1999/03/26 23:41:36 mycroft Exp $ */
+/*     $NetBSD: machdep.c,v 1.34 1999/03/28 16:01:19 eeh Exp $ */
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -1732,7 +1732,7 @@
 #endif
                pmap_enter_phys(pmap_kernel(), v, pa | pm_flags, NBPG,
                                (flags&BUS_SPACE_MAP_READONLY) ? VM_PROT_READ
-                               : VM_PROT_READ | VM_PROT_WRITE, 1, 0);
+                               : VM_PROT_READ | VM_PROT_WRITE, 1/*, 0*/);
                v += PAGE_SIZE;
                pa += PAGE_SIZE;
        } while ((size -= PAGE_SIZE) > 0);
diff -r 8f109773b731 -r e5c11b9a745b sys/arch/sparc64/sparc64/pmap.c
--- a/sys/arch/sparc64/sparc64/pmap.c   Sun Mar 28 14:03:36 1999 +0000
+++ b/sys/arch/sparc64/sparc64/pmap.c   Sun Mar 28 16:01:19 1999 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.c,v 1.29 1999/03/26 23:41:36 mycroft Exp $        */
+/*     $NetBSD: pmap.c,v 1.30 1999/03/28 16:01:19 eeh Exp $    */
 /* #define NO_VCACHE */ /* Don't forget the locked TLB in dostart */
 #define HWREF
 /* #define BOOT_DEBUG */
@@ -1842,9 +1842,29 @@
                                                        Debugger();
                                                        /* panic? */
                                                }
+#if 0  /* This breaks refcounting */
                                                /* This may cause us to enter the same mapping twice. */
                                                tsb_enter(npv->pv_pmap->pm_ctx,(npv->pv_va&PV_VAMASK),
                                                          pseg_get(npv->pv_pmap, va));
+#else
+                                               if (tsb[i].tag.tag > 0 && tsb[i].tag.tag == 
+                                                   TSB_TAG(0,pm->pm_ctx,va)) {
+                                                       /* 
+                                                        * Invalidate the TSB 
+                                                        * 
+                                                        * While we can invalidate it by clearing the
+                                                        * valid bit:
+                                                        *
+                                                        * ptp->data.data_v = 0;
+                                                        *
+                                                        * it's faster to do store 1 doubleword.
+                                                        */
+                                                       tsb[i].data.data = 0LL; 
+                                                       ASSERT((tsb[i].data.data & TLB_NFO) == 0);
+                                               }
+                                               /* Force reload -- protections may be changed */
+                                               tlb_flush_pte(va, pm->pm_ctx);  
+#endif
 #if 0
                                                /* XXXXXX We should now flush the DCACHE to make sure */
                                                dcache_flush_page((pv->pv_va&PV_VAMASK));
@@ -1876,7 +1896,26 @@
                            i, &tsb[i]);
        }
 #endif
+#if 0 /* This breaks refcounts */
        tsb_enter(pm->pm_ctx, va, tte.data.data);
+#else
+       if (tsb[i].tag.tag > 0 && tsb[i].tag.tag == TSB_TAG(0,pm->pm_ctx,va)) {
+               /* 
+                * Invalidate the TSB 
+                * 
+                * While we can invalidate it by clearing the
+                * valid bit:
+                *
+                * ptp->data.data_v = 0;
+                *
+                * it's faster to do store 1 doubleword.
+                */
+               tsb[i].data.data = 0LL; 
+               ASSERT((tsb[i].data.data & TLB_NFO) == 0);
+       }
+       /* Force reload -- protections may be changed */
+       tlb_flush_pte(va, pm->pm_ctx);  
+#endif
        ASSERT((tsb[i].data.data & TLB_NFO) == 0);
 #if 1
 #if 0
diff -r 8f109773b731 -r e5c11b9a745b sys/arch/sparc64/sparc64/trap.c
--- a/sys/arch/sparc64/sparc64/trap.c   Sun Mar 28 14:03:36 1999 +0000
+++ b/sys/arch/sparc64/sparc64/trap.c   Sun Mar 28 16:01:19 1999 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: trap.c,v 1.26 1999/03/24 05:51:14 mrg Exp $ */
+/*     $NetBSD: trap.c,v 1.27 1999/03/28 16:01:19 eeh Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -1056,6 +1056,8 @@
 #endif
                                return;
                        }
+#if 0
+/* XXXX Like, why are we doing this twice? */
                        if ((rv=uvm_fault(kernel_map, va, ftype, 0)) == KERN_SUCCESS) {
 #ifdef DEBUG
                                if (trapdebug&(TDB_ADDFLT|TDB_FOLLOW))
@@ -1064,6 +1066,7 @@
 #endif
                                return;
                        }
+#endif
 #ifdef DEBUG
                        if (trapdebug&(TDB_ADDFLT|TDB_FOLLOW))
                                printf("data_access_fault: kernel uvm_fault(%x, %x, %x, 0) sez %x -- failure\n",



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