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[src/trunk]: src Hopefully fix some problems seen with MP support on non-x86, ...
details: https://anonhg.NetBSD.org/src/rev/c2ceb92705db
branches: trunk
changeset: 466993:c2ceb92705db
user: ad <ad%NetBSD.org@localhost>
date: Wed Jan 08 17:38:41 2020 +0000
description:
Hopefully fix some problems seen with MP support on non-x86, in particular
where curcpu() is defined as curlwp->l_cpu:
- mi_switch(): undo the ~2007ish optimisation to unlock curlwp before
calling cpu_switchto(). It's not safe to let other actors mess with the
LWP (in particular l->l_cpu) while it's still context switching. This
removes l->l_ctxswtch.
- Move the LP_RUNNING flag into l->l_flag and rename to LW_RUNNING since
it's now covered by the LWP's lock.
- Ditch lwp_exit_switchaway() and just call mi_switch() instead. Everything
is in cache anyway so it wasn't buying much by trying to avoid saving old
state. This means cpu_switchto() will never be called with prevlwp ==
NULL.
- Remove some KERNEL_LOCK handling which hasn't been needed for years.
diffstat:
sys/arch/aarch64/aarch64/cpuswitch.S | 6 +-
sys/arch/aarch64/aarch64/genassym.cf | 3 +-
sys/arch/amd64/amd64/genassym.cf | 3 +-
sys/arch/amd64/amd64/locore.S | 6 +-
sys/arch/amd64/amd64/spl.S | 3 +-
sys/arch/arm/arm32/cpuswitch.S | 7 +-
sys/arch/arm/arm32/genassym.cf | 3 +-
sys/arch/hppa/hppa/genassym.cf | 3 +-
sys/arch/i386/i386/genassym.cf | 3 +-
sys/arch/i386/i386/locore.S | 8 +-
sys/arch/i386/i386/spl.S | 5 +-
sys/arch/mips/mips/genassym.cf | 3 +-
sys/arch/mips/mips/locore.S | 5 +-
sys/arch/mips/mips/mips_softint.c | 5 +-
sys/arch/powerpc/powerpc/genassym.cf | 3 +-
sys/arch/powerpc/powerpc/locore_subr.S | 4 +-
sys/arch/powerpc/powerpc/softint_machdep.c | 3 +-
sys/arch/riscv/riscv/genassym.cf | 3 +-
sys/arch/riscv/riscv/locore.S | 3 +-
sys/arch/sparc64/sparc64/genassym.cf | 3 +-
sys/arch/sparc64/sparc64/locore.s | 3 +-
sys/arch/vax/vax/genassym.cf | 3 +-
sys/arch/vax/vax/pmap.c | 6 +-
sys/arch/vax/vax/subr.S | 3 +-
sys/ddb/db_proc.c | 10 +-
sys/kern/init_main.c | 6 +-
sys/kern/kern_exec.c | 5 +-
sys/kern/kern_exit.c | 30 +--
sys/kern/kern_idle.c | 6 +-
sys/kern/kern_kthread.c | 9 +-
sys/kern/kern_lwp.c | 78 +++++-----
sys/kern/kern_resource.c | 6 +-
sys/kern/kern_runq.c | 15 +-
sys/kern/kern_sleepq.c | 6 +-
sys/kern/kern_softint.c | 20 +-
sys/kern/kern_synch.c | 205 +++++++---------------------
sys/rump/librump/rumpkern/lwproc.c | 12 +-
sys/rump/librump/rumpkern/scheduler.c | 6 +-
sys/sys/lwp.h | 6 +-
tests/rump/rumpkern/t_lwproc.c | 4 +-
40 files changed, 185 insertions(+), 336 deletions(-)
diffs (truncated from 1506 to 300 lines):
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/aarch64/aarch64/cpuswitch.S
--- a/sys/arch/aarch64/aarch64/cpuswitch.S Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/aarch64/aarch64/cpuswitch.S Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.13 2019/12/20 07:16:43 ryo Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.14 2020/01/08 17:38:41 ad Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -37,7 +37,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.13 2019/12/20 07:16:43 ryo Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.14 2020/01/08 17:38:41 ad Exp $")
/*
* At IPL_SCHED:
@@ -178,7 +178,6 @@
* cpu_switchto() bottom half arranges to start this when softlwp.
* kernel thread is to yield CPU for the pinned_lwp in the above.
* curcpu()->ci_mtx_count += 1;
- * softlwp->l_ctxswtch = 0;
* this returns as if cpu_switchto_softint finished normally.
* }
*/
@@ -189,7 +188,6 @@
ldr w2, [x3, #CI_MTX_COUNT] /* ->ci_mtx_count */
add w2, w2, #1
str w2, [x3, #CI_MTX_COUNT]
- str wzr, [x0, #L_CTXSWTCH] /* softlwp->l_ctxswtch = 0 */
msr daif, x19 /* restore interrupt mask */
ldp x19, x20, [sp], #16 /* restore */
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/aarch64/aarch64/genassym.cf
--- a/sys/arch/aarch64/aarch64/genassym.cf Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/aarch64/aarch64/genassym.cf Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.17 2019/12/28 17:19:43 jmcneill Exp $
+# $NetBSD: genassym.cf,v 1.18 2020/01/08 17:38:41 ad Exp $
#-
# Copyright (c) 2014 The NetBSD Foundation, Inc.
# All rights reserved.
@@ -148,7 +148,6 @@
define L_WCHAN offsetof(struct lwp, l_wchan)
define L_STAT offsetof(struct lwp, l_stat)
define L_PROC offsetof(struct lwp, l_proc)
-define L_CTXSWTCH offsetof(struct lwp, l_ctxswtch)
define L_PRIVATE offsetof(struct lwp, l_private)
define L_MD_FLAGS offsetof(struct lwp, l_md.md_flags)
define L_MD_UTF offsetof(struct lwp, l_md.md_utf)
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/amd64/amd64/genassym.cf
--- a/sys/arch/amd64/amd64/genassym.cf Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/amd64/amd64/genassym.cf Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.80 2019/12/30 23:32:29 thorpej Exp $
+# $NetBSD: genassym.cf,v 1.81 2020/01/08 17:38:41 ad Exp $
#
# Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -150,7 +150,6 @@
define L_PCB offsetof(struct lwp, l_addr)
define L_FLAG offsetof(struct lwp, l_flag)
define L_PROC offsetof(struct lwp, l_proc)
-define L_CTXSWTCH offsetof(struct lwp, l_ctxswtch)
define L_NCSW offsetof(struct lwp, l_ncsw)
define L_NOPREEMPT offsetof(struct lwp, l_nopreempt)
define L_DOPREEMPT offsetof(struct lwp, l_dopreempt)
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/amd64/amd64/locore.S
--- a/sys/arch/amd64/amd64/locore.S Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/amd64/amd64/locore.S Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.195 2019/12/15 02:58:21 manu Exp $ */
+/* $NetBSD: locore.S,v 1.196 2020/01/08 17:38:41 ad Exp $ */
/*
* Copyright-o-rama!
@@ -1836,14 +1836,10 @@
movq %rdi,%r13 /* oldlwp */
movq %rsi,%r12 /* newlwp */
- testq %r13,%r13 /* oldlwp = NULL ? */
- jz .Lskip_save
-
/* Save old context. */
movq L_PCB(%r13),%rax
movq %rsp,PCB_RSP(%rax)
movq %rbp,PCB_RBP(%rax)
-.Lskip_save:
/* Switch to newlwp's stack. */
movq L_PCB(%r12),%r14
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/amd64/amd64/spl.S
--- a/sys/arch/amd64/amd64/spl.S Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/amd64/amd64/spl.S Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: spl.S,v 1.42 2019/11/14 16:23:52 maxv Exp $ */
+/* $NetBSD: spl.S,v 1.43 2020/01/08 17:38:41 ad Exp $ */
/*
* Copyright (c) 2003 Wasabi Systems, Inc.
@@ -174,7 +174,6 @@
*/
ENTRY(softintr_ret)
incl CPUVAR(MTX_COUNT) /* re-adjust after mi_switch */
- movl $0,L_CTXSWTCH(%rax) /* %rax from cpu_switchto */
cli
jmp *%r13 /* back to Xspllower/Xdoreti */
END(softintr_ret)
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/arm/arm32/cpuswitch.S
--- a/sys/arch/arm/arm32/cpuswitch.S Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/arm/arm32/cpuswitch.S Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.95 2019/10/29 16:18:23 joerg Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.96 2020/01/08 17:38:41 ad Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -87,7 +87,7 @@
#include <arm/asm.h>
#include <arm/locore.h>
- RCSID("$NetBSD: cpuswitch.S,v 1.95 2019/10/29 16:18:23 joerg Exp $")
+ RCSID("$NetBSD: cpuswitch.S,v 1.96 2020/01/08 17:38:41 ad Exp $")
/* LINTSTUB: include <sys/param.h> */
@@ -460,9 +460,6 @@
add r3, r3, #1
str r3, [r7, #(CI_MTX_COUNT)]
- mov r3, #0 /* tell softint_dispatch */
- str r3, [r0, #(L_CTXSWTCH)] /* the soft lwp blocked */
-
msr cpsr_c, r6 /* restore interrupts */
pop {r4, r6, r7, pc} /* pop stack and return */
END(softint_tramp)
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/arm/arm32/genassym.cf
--- a/sys/arch/arm/arm32/genassym.cf Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/arm/arm32/genassym.cf Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.82 2019/11/24 11:23:16 skrll Exp $
+# $NetBSD: genassym.cf,v 1.83 2020/01/08 17:38:41 ad Exp $
# Copyright (c) 1982, 1990 The Regents of the University of California.
# All rights reserved.
@@ -160,7 +160,6 @@
define L_WCHAN offsetof(struct lwp, l_wchan)
define L_STAT offsetof(struct lwp, l_stat)
define L_PROC offsetof(struct lwp, l_proc)
-define L_CTXSWTCH offsetof(struct lwp, l_ctxswtch)
define L_PRIVATE offsetof(struct lwp, l_private)
define L_FLAG offsetof(struct lwp, l_flag)
define L_MD_FLAGS offsetof(struct lwp, l_md.md_flags)
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/hppa/hppa/genassym.cf
--- a/sys/arch/hppa/hppa/genassym.cf Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/hppa/hppa/genassym.cf Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.1 2014/02/24 07:23:43 skrll Exp $
+# $NetBSD: genassym.cf,v 1.2 2020/01/08 17:38:41 ad Exp $
# $OpenBSD: genassym.cf,v 1.18 2001/09/20 18:31:14 mickey Exp $
@@ -196,7 +196,6 @@
member L_WCHAN l_wchan
member L_MD l_md
member L_MD_REGS l_md.md_regs
-member L_CTXSWTCH l_ctxswtch
struct pcb
member PCB_FPREGS pcb_fpregs
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/i386/i386/genassym.cf
--- a/sys/arch/i386/i386/genassym.cf Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/i386/i386/genassym.cf Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.117 2019/12/30 23:32:29 thorpej Exp $
+# $NetBSD: genassym.cf,v 1.118 2020/01/08 17:38:41 ad Exp $
#
# Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -166,7 +166,6 @@
define L_PROC offsetof(struct lwp, l_proc)
define L_MD_REGS offsetof(struct lwp, l_md.md_regs)
define L_MD_FLAGS offsetof(struct lwp, l_md.md_flags)
-define L_CTXSWTCH offsetof(struct lwp, l_ctxswtch)
define L_MD_ASTPENDING offsetof(struct lwp, l_md.md_astpending)
define L_CPU offsetof(struct lwp, l_cpu)
define L_NCSW offsetof(struct lwp, l_ncsw)
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/i386/i386/locore.S
--- a/sys/arch/i386/i386/locore.S Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/i386/i386/locore.S Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.174 2019/11/21 19:27:54 ad Exp $ */
+/* $NetBSD: locore.S,v 1.175 2020/01/08 17:38:41 ad Exp $ */
/*
* Copyright-o-rama!
@@ -128,7 +128,7 @@
*/
#include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: locore.S,v 1.174 2019/11/21 19:27:54 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: locore.S,v 1.175 2020/01/08 17:38:41 ad Exp $");
#include "opt_copy_symtab.h"
#include "opt_ddb.h"
@@ -1316,14 +1316,10 @@
movl 20(%esp),%edi /* newlwp */
movl 24(%esp),%edx /* returning */
- testl %esi,%esi /* oldlwp = NULL ? */
- jz skip_save
-
/* Save old context. */
movl L_PCB(%esi),%eax
movl %esp,PCB_ESP(%eax)
movl %ebp,PCB_EBP(%eax)
-skip_save:
/* Switch to newlwp's stack. */
movl L_PCB(%edi),%ebx
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/i386/i386/spl.S
--- a/sys/arch/i386/i386/spl.S Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/i386/i386/spl.S Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: spl.S,v 1.49 2019/10/12 06:31:03 maxv Exp $ */
+/* $NetBSD: spl.S,v 1.50 2020/01/08 17:38:41 ad Exp $ */
/*
* Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: spl.S,v 1.49 2019/10/12 06:31:03 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: spl.S,v 1.50 2020/01/08 17:38:41 ad Exp $");
#include "opt_ddb.h"
#include "opt_spldebug.h"
@@ -404,7 +404,6 @@
*/
ENTRY(softintr_ret)
incl CPUVAR(MTX_COUNT) /* re-adjust after mi_switch */
- movl $0,L_CTXSWTCH(%eax) /* %eax from cpu_switchto */
cli
jmp *%esi /* back to splx/doreti */
END(softintr_ret)
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/mips/mips/genassym.cf
--- a/sys/arch/mips/mips/genassym.cf Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/mips/mips/genassym.cf Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.67 2016/07/11 16:15:36 matt Exp $
+# $NetBSD: genassym.cf,v 1.68 2020/01/08 17:38:42 ad Exp $
#
# Copyright (c) 1992, 1993
# The Regents of the University of California. All rights reserved.
@@ -137,7 +137,6 @@
# Important offsets into the lwp and proc structs & associated constants
define L_CPU offsetof(struct lwp, l_cpu)
-define L_CTXSWITCH offsetof(struct lwp, l_ctxswtch)
define L_PCB offsetof(struct lwp, l_addr)
define L_PRIORITY offsetof(struct lwp, l_priority)
define L_PRIVATE offsetof(struct lwp, l_private)
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/mips/mips/locore.S
--- a/sys/arch/mips/mips/locore.S Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/mips/mips/locore.S Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.220 2019/09/05 15:48:13 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.221 2020/01/08 17:38:42 ad Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -63,7 +63,7 @@
#include <mips/trap.h>
#include <mips/locore.h>
-RCSID("$NetBSD: locore.S,v 1.220 2019/09/05 15:48:13 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.221 2020/01/08 17:38:42 ad Exp $")
#include "assym.h"
@@ -377,7 +377,6 @@
REG_L ra, CALLFRAME_RA(sp)
REG_L v0, CALLFRAME_S0(sp) # get softint lwp
NOP_L # load delay
- PTR_S zero, L_CTXSWITCH(v0) # clear l_ctxswtch
#if IPL_SCHED != IPL_HIGH
j _C_LABEL(splhigh_noprof)
#else
diff -r 82fcc35cc7e6 -r c2ceb92705db sys/arch/mips/mips/mips_softint.c
--- a/sys/arch/mips/mips/mips_softint.c Wed Jan 08 17:23:34 2020 +0000
+++ b/sys/arch/mips/mips/mips_softint.c Wed Jan 08 17:38:41 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_softint.c,v 1.7 2015/06/06 04:43:41 matt Exp $ */
+/* $NetBSD: mips_softint.c,v 1.8 2020/01/08 17:38:42 ad Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
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