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[src/trunk]: src/sys/arch/arm/ti Add OMAP3 USB support.
details: https://anonhg.NetBSD.org/src/rev/d228f62772ca
branches: trunk
changeset: 460682:d228f62772ca
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Wed Oct 30 21:41:40 2019 +0000
description:
Add OMAP3 USB support.
diffstat:
sys/arch/arm/ti/files.ti | 13 ++-
sys/arch/arm/ti/omap3_cm.c | 155 +++++++++++++++++++-----------
sys/arch/arm/ti/ti_ehci.c | 157 +++++++++++++++++++++++++++++++
sys/arch/arm/ti/ti_prcm.h | 10 +-
sys/arch/arm/ti/ti_usb.c | 221 ++++++++++++++++++++++++++++++++++++++++++++
sys/arch/arm/ti/ti_usbtll.c | 203 ++++++++++++++++++++++++++++++++++++++++
6 files changed, 696 insertions(+), 63 deletions(-)
diffs (truncated from 868 to 300 lines):
diff -r 1a9216e16d95 -r d228f62772ca sys/arch/arm/ti/files.ti
--- a/sys/arch/arm/ti/files.ti Wed Oct 30 21:40:04 2019 +0000
+++ b/sys/arch/arm/ti/files.ti Wed Oct 30 21:41:40 2019 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.ti,v 1.16 2019/10/29 22:19:13 jmcneill Exp $
+# $NetBSD: files.ti,v 1.17 2019/10/30 21:41:40 jmcneill Exp $
#
file arch/arm/ti/ti_cpufreq.c soc_ti
@@ -88,6 +88,17 @@
attach tiotg at fdt with ti_otg
file arch/arm/ti/ti_otg.c ti_otg
+device tiusb { } : fdt
+attach tiusb at fdt with ti_usb
+file arch/arm/ti/ti_usb.c ti_usb
+
+device tiusbtll
+attach tiusbtll at fdt with ti_usbtll
+file arch/arm/ti/ti_usbtll.c ti_usbtll
+
+attach ehci at fdt with ti_ehci
+file arch/arm/ti/ti_ehci.c ti_ehci
+
attach motg at fdt with ti_motg
file arch/arm/ti/ti_motg.c ti_motg
diff -r 1a9216e16d95 -r d228f62772ca sys/arch/arm/ti/omap3_cm.c
--- a/sys/arch/arm/ti/omap3_cm.c Wed Oct 30 21:40:04 2019 +0000
+++ b/sys/arch/arm/ti/omap3_cm.c Wed Oct 30 21:41:40 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: omap3_cm.c,v 1.1 2019/10/29 22:19:13 jmcneill Exp $ */
+/* $NetBSD: omap3_cm.c,v 1.2 2019/10/30 21:41:40 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: omap3_cm.c,v 1.1 2019/10/29 22:19:13 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: omap3_cm.c,v 1.2 2019/10/30 21:41:40 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -43,11 +43,20 @@
#define CM_CORE1_BASE 0x0a00
#define CM_CORE3_BASE 0x0a08
#define CM_WKUP_BASE 0x0c00
+#define CM_CLK_CTRL_REG_BASE 0x0d00
#define CM_PER_BASE 0x1000
#define CM_USBHOST_BASE 0x1400
#define CM_FCLKEN 0x00
#define CM_ICLKEN 0x10
+#define CM_AUTOIDLE 0x30
+#define CM_CLKSEL 0x40
+
+#define CM_CLKEN2_PLL 0x04
+#define CM_IDLEST2_CKGEN 0x24
+#define CM_AUTOIDLE2_PLL 0x34
+#define CM_CLKSEL4_PLL 0x4c
+#define CM_CLKSEL5_PLL 0x50
static int omap3_cm_match(device_t, cfdata_t, void *);
static void omap3_cm_attach(device_t, device_t, void *);
@@ -71,19 +80,25 @@
val &= ~tc->u.hwmod.mask;
PRCM_WRITE(sc, tc->u.hwmod.reg + CM_ICLKEN, val);
+ if (tc->u.hwmod.flags & TI_HWMOD_DISABLE_AUTOIDLE) {
+ val = PRCM_READ(sc, tc->u.hwmod.reg + CM_AUTOIDLE);
+ val &= ~tc->u.hwmod.mask;
+ PRCM_WRITE(sc, tc->u.hwmod.reg + CM_AUTOIDLE, val);
+ }
+
return 0;
}
-#define OMAP3_CM_HWMOD_CORE1(_name, _bit, _parent) \
- TI_PRCM_HWMOD_MASK((_name), CM_CORE1_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable)
-#define OMAP3_CM_HWMOD_CORE3(_name, _bit, _parent) \
- TI_PRCM_HWMOD_MASK((_name), CM_CORE3_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable)
-#define OMAP3_CM_HWMOD_WKUP(_name, _bit, _parent) \
- TI_PRCM_HWMOD_MASK((_name), CM_WKUP_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable)
-#define OMAP3_CM_HWMOD_PER(_name, _bit, _parent) \
- TI_PRCM_HWMOD_MASK((_name), CM_PER_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable)
-#define OMAP3_CM_HWMOD_USBHOST(_name, _mask, _parent) \
- TI_PRCM_HWMOD_MASK((_name), CM_USBHOST_BASE, (_mask), (_parent), omap3_cm_hwmod_enable)
+#define OMAP3_CM_HWMOD_CORE1(_name, _bit, _parent, _flags) \
+ TI_PRCM_HWMOD_MASK((_name), CM_CORE1_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable, (_flags))
+#define OMAP3_CM_HWMOD_CORE3(_name, _bit, _parent, _flags) \
+ TI_PRCM_HWMOD_MASK((_name), CM_CORE3_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable, (_flags))
+#define OMAP3_CM_HWMOD_WKUP(_name, _bit, _parent, _flags) \
+ TI_PRCM_HWMOD_MASK((_name), CM_WKUP_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable, (_flags))
+#define OMAP3_CM_HWMOD_PER(_name, _bit, _parent, _flags) \
+ TI_PRCM_HWMOD_MASK((_name), CM_PER_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable, (_flags))
+#define OMAP3_CM_HWMOD_USBHOST(_name, _bit, _parent, _flags) \
+ TI_PRCM_HWMOD_MASK((_name), CM_USBHOST_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable, (_flags))
static const char * const compatible[] = {
"ti,omap3-cm",
@@ -96,58 +111,78 @@
static struct ti_prcm_clk omap3_cm_clks[] = {
/* XXX until we get a proper clock tree */
TI_PRCM_FIXED("FIXED_32K", 32768),
- TI_PRCM_FIXED("FIXED_48MHZ", 48000000),
- TI_PRCM_FIXED("FIXED_96MHZ", 96000000),
- TI_PRCM_FIXED_FACTOR("PERIPH_CLK", 1, 1, "FIXED_48MHZ"),
- TI_PRCM_FIXED_FACTOR("MMC_CLK", 1, 1, "FIXED_96MHZ"),
+ TI_PRCM_FIXED("SYS_CLK", 13000000),
+ TI_PRCM_FIXED("MMC_CLK", 96000000),
+ TI_PRCM_FIXED_FACTOR("PERIPH_CLK", 1, 1, "SYS_CLK"),
- OMAP3_CM_HWMOD_CORE1("usb_otg_hs", 4, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("mcbsp1", 9, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("mcbsp5", 10, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("timer10", 11, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("timer11", 12, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("uart1", 13, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("uart2", 14, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("i2c1", 15, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("i2c2", 16, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("i2c3", 17, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("mcspi1", 18, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("mcspi2", 19, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("mcspi3", 20, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("mcspi4", 21, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("hdq1w", 22, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_CORE1("mmc1", 24, "MMC_CLK"),
- OMAP3_CM_HWMOD_CORE1("mmc2", 25, "MMC_CLK"),
- OMAP3_CM_HWMOD_CORE1("mmc3", 30, "MMC_CLK"),
+ OMAP3_CM_HWMOD_CORE1("usb_otg_hs", 4, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("mcbsp1", 9, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("mcbsp5", 10, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("timer10", 11, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("timer11", 12, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("uart1", 13, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("uart2", 14, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("i2c1", 15, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("i2c2", 16, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("i2c3", 17, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("mcspi1", 18, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("mcspi2", 19, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("mcspi3", 20, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("mcspi4", 21, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("hdq1w", 22, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("mmc1", 24, "MMC_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("mmc2", 25, "MMC_CLK", 0),
+ OMAP3_CM_HWMOD_CORE1("mmc3", 30, "MMC_CLK", 0),
- OMAP3_CM_HWMOD_CORE3("usb_tll_hs", 2, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE3("usb_tll_hs", 2, "PERIPH_CLK", TI_HWMOD_DISABLE_AUTOIDLE),
+
+ OMAP3_CM_HWMOD_WKUP("timer1", 0, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_WKUP("counter_32k", 2, "FIXED_32K", 0),
+ OMAP3_CM_HWMOD_WKUP("gpio1", 3, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_WKUP("wd_timer2", 5, "FIXED_32K", 0),
- OMAP3_CM_HWMOD_WKUP("timer1", 0, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_WKUP("counter_32k", 2, "FIXED_32K"),
- OMAP3_CM_HWMOD_WKUP("gpio1", 3, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_WKUP("wd_timer2", 5, "FIXED_32K"),
+ OMAP3_CM_HWMOD_PER("mcbsp2", 0, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("mcbsp3", 1, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("mcbsp4", 2, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("timer2", 3, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("timer3", 4, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("timer4", 5, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("timer5", 6, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("timer6", 7, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("timer7", 8, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("timer8", 9, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("timer9", 10, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("uart3", 11, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("wd_timer3", 12, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("gpio2", 13, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("gpio3", 14, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("gpio4", 15, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("gpio5", 16, "PERIPH_CLK", 0),
+ OMAP3_CM_HWMOD_PER("gpio6", 17, "PERIPH_CLK", 0),
- OMAP3_CM_HWMOD_PER("mcbsp2", 0, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("mcbsp3", 1, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("mcbsp4", 2, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("timer2", 3, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("timer3", 4, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("timer4", 5, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("timer5", 6, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("timer6", 7, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("timer7", 8, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("timer8", 9, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("timer9", 10, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("uart3", 11, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("wd_timer3", 12, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("gpio2", 13, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("gpio3", 14, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("gpio4", 15, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("gpio5", 16, "PERIPH_CLK"),
- OMAP3_CM_HWMOD_PER("gpio6", 17, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_USBHOST("usb_host_hs", 0, "PERIPH_CLK", 0),
+};
+
+static void
+omap3_cm_initclocks(struct ti_prcm_softc *sc)
+{
+ uint32_t val;
- OMAP3_CM_HWMOD_USBHOST("usb_host_hs", __BITS(1,0), "PERIPH_CLK"),
-};
+ /* Select SYS_CLK for GPTIMER 2 and 3 */
+ val = PRCM_READ(sc, CM_PER_BASE + CM_CLKSEL);
+ val |= __BIT(0); /* CLKSEL_GPT2 0x1: source is SYS_CLK */
+ val |= __BIT(1); /* CLKSEL_GPT3 0x1: source is SYS_CLK */
+ PRCM_WRITE(sc, CM_PER_BASE + CM_CLKSEL, val);
+
+ /* Enable DPLL5 */
+ const u_int m = 443, n = 11, m2 = 4;
+ PRCM_WRITE(sc, CM_CLK_CTRL_REG_BASE + CM_CLKEN2_PLL, (0x4 << 4) | 0x7);
+ PRCM_WRITE(sc, CM_CLK_CTRL_REG_BASE + CM_CLKSEL4_PLL, (m << 8) | n);
+ PRCM_WRITE(sc, CM_CLK_CTRL_REG_BASE + CM_CLKSEL5_PLL, m2);
+ PRCM_WRITE(sc, CM_CLK_CTRL_REG_BASE + CM_AUTOIDLE2_PLL, 1);
+ while ((PRCM_READ(sc, CM_CLK_CTRL_REG_BASE + CM_IDLEST2_CKGEN) & 1) == 0)
+ delay(100);
+}
static int
omap3_cm_match(device_t parent, cfdata_t cf, void *aux)
@@ -177,6 +212,8 @@
aprint_naive("\n");
aprint_normal(": OMAP3xxx CM\n");
+ omap3_cm_initclocks(sc);
+
clocks = of_find_firstchild_byname(sc->sc_phandle, "clocks");
if (clocks > 0)
fdt_add_bus(self, clocks, faa);
diff -r 1a9216e16d95 -r d228f62772ca sys/arch/arm/ti/ti_ehci.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/ti/ti_ehci.c Wed Oct 30 21:41:40 2019 +0000
@@ -0,0 +1,157 @@
+/* $NetBSD: ti_ehci.c,v 1.1 2019/10/30 21:41:40 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2015-2019 Jared McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: ti_ehci.c,v 1.1 2019/10/30 21:41:40 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+#include <dev/usb/usbdivar.h>
+#include <dev/usb/usb_mem.h>
+#include <dev/usb/ehcireg.h>
+#include <dev/usb/ehcivar.h>
+
+#include <dev/fdt/fdtvar.h>
+
+#define TI_EHCI_NPORTS 3
+
+static int ti_ehci_match(device_t, cfdata_t, void *);
+static void ti_ehci_attach(device_t, device_t, void *);
+
+CFATTACH_DECL2_NEW(ti_ehci, sizeof(struct ehci_softc),
+ ti_ehci_match, ti_ehci_attach, NULL,
+ ehci_activate, NULL, ehci_childdet);
+
+static int
+ti_ehci_match(device_t parent, cfdata_t cf, void *aux)
+{
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