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[src/trunk]: src/sys/arch/arm/ti Add support for TI OMAP3.
details: https://anonhg.NetBSD.org/src/rev/d6b6a8ff44d0
branches: trunk
changeset: 460647:d6b6a8ff44d0
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Tue Oct 29 22:19:13 2019 +0000
description:
Add support for TI OMAP3.
diffstat:
sys/arch/arm/ti/files.ti | 14 ++-
sys/arch/arm/ti/omap3_cm.c | 183 +++++++++++++++++++++++++++++++++++
sys/arch/arm/ti/omap3_platform.c | 200 +++++++++++++++++++++++++++++++++++++++
sys/arch/arm/ti/omap3_prm.c | 77 +++++++++++++++
sys/arch/arm/ti/ti_com.c | 6 +-
sys/arch/arm/ti/ti_dpll_clock.c | 159 ++++++++++++++++++++++++------
sys/arch/arm/ti/ti_gpio.c | 37 ++++--
sys/arch/arm/ti/ti_iic.c | 27 +++--
sys/arch/arm/ti/ti_omapintc.c | 49 ++++----
sys/arch/arm/ti/ti_omaptimer.c | 105 +++++++++++++-------
sys/arch/arm/ti/ti_prcm.c | 11 +-
sys/arch/arm/ti/ti_prcm.h | 7 +-
sys/arch/arm/ti/ti_rng.c | 6 +-
sys/arch/arm/ti/ti_sdhc.c | 6 +-
14 files changed, 754 insertions(+), 133 deletions(-)
diffs (truncated from 1425 to 300 lines):
diff -r 62b6b8c7cc07 -r d6b6a8ff44d0 sys/arch/arm/ti/files.ti
--- a/sys/arch/arm/ti/files.ti Tue Oct 29 22:18:28 2019 +0000
+++ b/sys/arch/arm/ti/files.ti Tue Oct 29 22:19:13 2019 +0000
@@ -1,8 +1,9 @@
-# $NetBSD: files.ti,v 1.15 2019/10/29 10:54:10 jmcneill Exp $
+# $NetBSD: files.ti,v 1.16 2019/10/29 22:19:13 jmcneill Exp $
#
file arch/arm/ti/ti_cpufreq.c soc_ti
file arch/arm/ti/am3_platform.c soc_am33xx
+file arch/arm/ti/omap3_platform.c soc_omap3
# Interrupt controller
device omapintc: pic, pic_splfuncs
@@ -23,6 +24,16 @@
attach am3prcm at fdt with am3_prcm
file arch/arm/ti/am3_prcm.c am3_prcm
+# CM (OMAP3)
+device omap3cm { } : fdt, ti_prcm
+attach omap3cm at fdt with omap3_cm
+file arch/arm/ti/omap3_cm.c omap3_cm
+
+# PRM (OMAP3)
+device omap3prm { } : fdt
+attach omap3prm at fdt with omap3_prm
+file arch/arm/ti/omap3_prm.c omap3_prm
+
# Clocks
device timuxclk
attach timuxclk at fdt with ti_mux_clock
@@ -88,3 +99,4 @@
# SOC parameters
defflag opt_soc.h SOC_TI
defflag opt_soc.h SOC_AM33XX: SOC_TI
+defflag opt_soc.h SOC_OMAP3: SOC_TI
diff -r 62b6b8c7cc07 -r d6b6a8ff44d0 sys/arch/arm/ti/omap3_cm.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/ti/omap3_cm.c Tue Oct 29 22:19:13 2019 +0000
@@ -0,0 +1,183 @@
+/* $NetBSD: omap3_cm.c,v 1.1 2019/10/29 22:19:13 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+
+__KERNEL_RCSID(1, "$NetBSD: omap3_cm.c,v 1.1 2019/10/29 22:19:13 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+
+#include <dev/fdt/fdtvar.h>
+
+#define TI_PRCM_PRIVATE
+#include <arm/ti/ti_prcm.h>
+
+#define CM_CORE1_BASE 0x0a00
+#define CM_CORE3_BASE 0x0a08
+#define CM_WKUP_BASE 0x0c00
+#define CM_PER_BASE 0x1000
+#define CM_USBHOST_BASE 0x1400
+
+#define CM_FCLKEN 0x00
+#define CM_ICLKEN 0x10
+
+static int omap3_cm_match(device_t, cfdata_t, void *);
+static void omap3_cm_attach(device_t, device_t, void *);
+
+static int
+omap3_cm_hwmod_enable(struct ti_prcm_softc *sc, struct ti_prcm_clk *tc, int enable)
+{
+ uint32_t val;
+
+ val = PRCM_READ(sc, tc->u.hwmod.reg + CM_FCLKEN);
+ if (enable)
+ val |= tc->u.hwmod.mask;
+ else
+ val &= ~tc->u.hwmod.mask;
+ PRCM_WRITE(sc, tc->u.hwmod.reg + CM_FCLKEN, val);
+
+ val = PRCM_READ(sc, tc->u.hwmod.reg + CM_ICLKEN);
+ if (enable)
+ val |= tc->u.hwmod.mask;
+ else
+ val &= ~tc->u.hwmod.mask;
+ PRCM_WRITE(sc, tc->u.hwmod.reg + CM_ICLKEN, val);
+
+ return 0;
+}
+
+#define OMAP3_CM_HWMOD_CORE1(_name, _bit, _parent) \
+ TI_PRCM_HWMOD_MASK((_name), CM_CORE1_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable)
+#define OMAP3_CM_HWMOD_CORE3(_name, _bit, _parent) \
+ TI_PRCM_HWMOD_MASK((_name), CM_CORE3_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable)
+#define OMAP3_CM_HWMOD_WKUP(_name, _bit, _parent) \
+ TI_PRCM_HWMOD_MASK((_name), CM_WKUP_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable)
+#define OMAP3_CM_HWMOD_PER(_name, _bit, _parent) \
+ TI_PRCM_HWMOD_MASK((_name), CM_PER_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable)
+#define OMAP3_CM_HWMOD_USBHOST(_name, _mask, _parent) \
+ TI_PRCM_HWMOD_MASK((_name), CM_USBHOST_BASE, (_mask), (_parent), omap3_cm_hwmod_enable)
+
+static const char * const compatible[] = {
+ "ti,omap3-cm",
+ NULL
+};
+
+CFATTACH_DECL_NEW(omap3_cm, sizeof(struct ti_prcm_softc),
+ omap3_cm_match, omap3_cm_attach, NULL, NULL);
+
+static struct ti_prcm_clk omap3_cm_clks[] = {
+ /* XXX until we get a proper clock tree */
+ TI_PRCM_FIXED("FIXED_32K", 32768),
+ TI_PRCM_FIXED("FIXED_48MHZ", 48000000),
+ TI_PRCM_FIXED("FIXED_96MHZ", 96000000),
+ TI_PRCM_FIXED_FACTOR("PERIPH_CLK", 1, 1, "FIXED_48MHZ"),
+ TI_PRCM_FIXED_FACTOR("MMC_CLK", 1, 1, "FIXED_96MHZ"),
+
+ OMAP3_CM_HWMOD_CORE1("usb_otg_hs", 4, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("mcbsp1", 9, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("mcbsp5", 10, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("timer10", 11, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("timer11", 12, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("uart1", 13, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("uart2", 14, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("i2c1", 15, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("i2c2", 16, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("i2c3", 17, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("mcspi1", 18, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("mcspi2", 19, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("mcspi3", 20, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("mcspi4", 21, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("hdq1w", 22, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_CORE1("mmc1", 24, "MMC_CLK"),
+ OMAP3_CM_HWMOD_CORE1("mmc2", 25, "MMC_CLK"),
+ OMAP3_CM_HWMOD_CORE1("mmc3", 30, "MMC_CLK"),
+
+ OMAP3_CM_HWMOD_CORE3("usb_tll_hs", 2, "PERIPH_CLK"),
+
+ OMAP3_CM_HWMOD_WKUP("timer1", 0, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_WKUP("counter_32k", 2, "FIXED_32K"),
+ OMAP3_CM_HWMOD_WKUP("gpio1", 3, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_WKUP("wd_timer2", 5, "FIXED_32K"),
+
+ OMAP3_CM_HWMOD_PER("mcbsp2", 0, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("mcbsp3", 1, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("mcbsp4", 2, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("timer2", 3, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("timer3", 4, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("timer4", 5, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("timer5", 6, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("timer6", 7, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("timer7", 8, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("timer8", 9, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("timer9", 10, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("uart3", 11, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("wd_timer3", 12, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("gpio2", 13, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("gpio3", 14, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("gpio4", 15, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("gpio5", 16, "PERIPH_CLK"),
+ OMAP3_CM_HWMOD_PER("gpio6", 17, "PERIPH_CLK"),
+
+ OMAP3_CM_HWMOD_USBHOST("usb_host_hs", __BITS(1,0), "PERIPH_CLK"),
+};
+
+static int
+omap3_cm_match(device_t parent, cfdata_t cf, void *aux)
+{
+ struct fdt_attach_args * const faa = aux;
+
+ return of_match_compatible(faa->faa_phandle, compatible);
+}
+
+static void
+omap3_cm_attach(device_t parent, device_t self, void *aux)
+{
+ struct ti_prcm_softc * const sc = device_private(self);
+ struct fdt_attach_args * const faa = aux;
+ int clocks;
+
+ sc->sc_dev = self;
+ sc->sc_phandle = faa->faa_phandle;
+ sc->sc_bst = faa->faa_bst;
+
+ sc->sc_clks = omap3_cm_clks;
+ sc->sc_nclks = __arraycount(omap3_cm_clks);
+
+ if (ti_prcm_attach(sc) != 0)
+ return;
+
+ aprint_naive("\n");
+ aprint_normal(": OMAP3xxx CM\n");
+
+ clocks = of_find_firstchild_byname(sc->sc_phandle, "clocks");
+ if (clocks > 0)
+ fdt_add_bus(self, clocks, faa);
+}
diff -r 62b6b8c7cc07 -r d6b6a8ff44d0 sys/arch/arm/ti/omap3_platform.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/ti/omap3_platform.c Tue Oct 29 22:19:13 2019 +0000
@@ -0,0 +1,200 @@
+/* $NetBSD: omap3_platform.c,v 1.1 2019/10/29 22:19:13 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2019 Jared McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "opt_soc.h"
+#include "opt_console.h"
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: omap3_platform.c,v 1.1 2019/10/29 22:19:13 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/cpu.h>
+#include <sys/device.h>
+#include <sys/termios.h>
+
+#include <dev/fdt/fdtvar.h>
+#include <arm/fdt/arm_fdtvar.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/bootconfig.h>
+#include <arm/cpufunc.h>
+
+#include <dev/ic/ns16550reg.h>
+#include <dev/ic/comreg.h>
+
+#include <evbarm/fdt/platform.h>
+#include <evbarm/fdt/machdep.h>
+
+#include <net/if_ether.h>
+
+#include <libfdt.h>
+
+#define OMAP3_L4_CORE_VBASE KERNEL_IO_VBASE
+#define OMAP3_L4_CORE_PBASE 0x48000000
+#define OMAP3_L4_CORE_SIZE 0x00100000
+
+#define OMAP3_L4_WKUP_VBASE (OMAP3_L4_CORE_VBASE + OMAP3_L4_CORE_SIZE)
+#define OMAP3_L4_WKUP_PBASE 0x48300000
+#define OMAP3_L4_WKUP_SIZE 0x00100000
+
+#define OMAP3_L4_PER_VBASE (OMAP3_L4_WKUP_VBASE + OMAP3_L4_WKUP_SIZE)
+#define OMAP3_L4_PER_PBASE 0x49000000
+#define OMAP3_L4_PER_SIZE 0x00100000
+
+#define OMAP3_PRCM_BASE 0x48306000
+#define OMAP3_PRCM_GR_BASE (OMAP3_PRCM_BASE + 0x1200)
+#define PRM_RSTCTRL (OMAP3_PRCM_GR_BASE + 0x50)
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