Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/arm/ti Add EDMA TPCC and TPTC drivers.
details: https://anonhg.NetBSD.org/src/rev/5ffc11b8ff51
branches: trunk
changeset: 460531:5ffc11b8ff51
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sun Oct 27 12:14:51 2019 +0000
description:
Add EDMA TPCC and TPTC drivers.
diffstat:
sys/arch/arm/ti/am3_prcm.c | 9 +-
sys/arch/arm/ti/files.ti | 10 +-
sys/arch/arm/ti/ti_com.c | 9 +-
sys/arch/arm/ti/ti_edma.c | 550 +++++++++++++++++++++++++++++++++++++++++++++
sys/arch/arm/ti/ti_edma.h | 173 ++++++++++++++
sys/arch/arm/ti/ti_prcm.c | 16 +-
sys/arch/arm/ti/ti_prcm.h | 3 +-
sys/arch/arm/ti/ti_tptc.c | 75 ++++++
8 files changed, 833 insertions(+), 12 deletions(-)
diffs (truncated from 951 to 300 lines):
diff -r fc82d82c22d2 -r 5ffc11b8ff51 sys/arch/arm/ti/am3_prcm.c
--- a/sys/arch/arm/ti/am3_prcm.c Sun Oct 27 11:33:56 2019 +0000
+++ b/sys/arch/arm/ti/am3_prcm.c Sun Oct 27 12:14:51 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: am3_prcm.c,v 1.1 2017/10/26 23:28:15 jmcneill Exp $ */
+/* $NetBSD: am3_prcm.c,v 1.2 2019/10/27 12:14:51 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: am3_prcm.c,v 1.1 2017/10/26 23:28:15 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: am3_prcm.c,v 1.2 2019/10/27 12:14:51 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -108,6 +108,11 @@
AM3_PRCM_HWMOD_PER("mmc0", 0x3c, "MMC_CLK"),
AM3_PRCM_HWMOD_PER("mmc1", 0xf4, "MMC_CLK"),
AM3_PRCM_HWMOD_PER("mmc2", 0xf8, "MMC_CLK"),
+
+ AM3_PRCM_HWMOD_PER("tpcc", 0xbc, "PERIPH_CLK"),
+ AM3_PRCM_HWMOD_PER("tptc0", 0x24, "PERIPH_CLK"),
+ AM3_PRCM_HWMOD_PER("tptc1", 0xfc, "PERIPH_CLK"),
+ AM3_PRCM_HWMOD_PER("tptc2", 0x100, "PERIPH_CLK"),
};
static int
diff -r fc82d82c22d2 -r 5ffc11b8ff51 sys/arch/arm/ti/files.ti
--- a/sys/arch/arm/ti/files.ti Sun Oct 27 11:33:56 2019 +0000
+++ b/sys/arch/arm/ti/files.ti Sun Oct 27 12:14:51 2019 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.ti,v 1.7 2019/10/27 11:33:56 jmcneill Exp $
+# $NetBSD: files.ti,v 1.8 2019/10/27 12:14:51 jmcneill Exp $
#
file arch/arm/ti/ti_platform.c soc_ti
@@ -36,6 +36,14 @@
attach cpsw at fdt
file arch/arm/ti/if_cpsw.c cpsw
+# EDMA
+device tiedma
+attach tiedma at fdt with ti_edma
+file arch/arm/ti/ti_edma.c ti_edma
+device titptc
+attach titptc at fdt with ti_tptc
+file arch/arm/ti/ti_tptc.c ti_tptc
+
# SOC parameters
defflag opt_soc.h SOC_TI
defflag opt_soc.h SOC_TI_AM335X: SOC_TI
diff -r fc82d82c22d2 -r 5ffc11b8ff51 sys/arch/arm/ti/ti_com.c
--- a/sys/arch/arm/ti/ti_com.c Sun Oct 27 11:33:56 2019 +0000
+++ b/sys/arch/arm/ti/ti_com.c Sun Oct 27 12:14:51 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ti_com.c,v 1.6 2019/10/27 11:33:56 jmcneill Exp $ */
+/* $NetBSD: ti_com.c,v 1.7 2019/10/27 12:14:51 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: ti_com.c,v 1.6 2019/10/27 11:33:56 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: ti_com.c,v 1.7 2019/10/27 12:14:51 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -79,7 +79,6 @@
bus_space_handle_t bsh;
bus_space_tag_t bst;
char intrstr[128];
- struct clk *hwmod;
bus_addr_t addr;
bus_size_t size;
int error;
@@ -106,9 +105,7 @@
return;
}
- hwmod = ti_prcm_get_hwmod(OF_parent(phandle), 0);
- KASSERT(hwmod != NULL);
- if (clk_enable(hwmod) != 0) {
+ if (ti_prcm_enable_hwmod(OF_parent(phandle), 0) != 0) {
aprint_error(": couldn't enable module\n");
return;
}
diff -r fc82d82c22d2 -r 5ffc11b8ff51 sys/arch/arm/ti/ti_edma.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/ti/ti_edma.c Sun Oct 27 12:14:51 2019 +0000
@@ -0,0 +1,550 @@
+/* $NetBSD: ti_edma.c,v 1.1 2019/10/27 12:14:51 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: ti_edma.c,v 1.1 2019/10/27 12:14:51 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/conf.h>
+#include <sys/intr.h>
+#include <sys/mutex.h>
+#include <sys/bus.h>
+#include <sys/bitops.h>
+
+#include <dev/fdt/fdtvar.h>
+
+#include <arm/ti/ti_prcm.h>
+#include <arm/ti/ti_edma.h>
+
+#define NUM_DMA_CHANNELS 64
+#define NUM_PARAM_SETS 256
+#define MAX_PARAM_PER_CHANNEL 32
+
+#ifdef EDMA_DEBUG
+int edmadebug = 1;
+#define DPRINTF(n,s) do { if ((n) <= edmadebug) device_printf s; } while (0)
+#else
+#define DPRINTF(n,s) do {} while (0)
+#endif
+
+struct edma_softc;
+
+struct edma_channel {
+ struct edma_softc *ch_sc;
+ enum edma_type ch_type;
+ uint8_t ch_index;
+ void (*ch_callback)(void *);
+ void *ch_callbackarg;
+ unsigned int ch_nparams;
+};
+
+struct edma_softc {
+ device_t sc_dev;
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
+ kmutex_t sc_lock;
+ struct edma_channel sc_dma[NUM_DMA_CHANNELS];
+
+ void *sc_ih;
+
+ uint32_t sc_dmamask[NUM_DMA_CHANNELS / 32];
+ uint32_t sc_parammask[NUM_PARAM_SETS / 32];
+};
+
+static int edma_match(device_t, cfdata_t, void *);
+static void edma_attach(device_t, device_t, void *);
+
+static void edma_init(struct edma_softc *);
+static int edma_intr(void *);
+static void edma_write_param(struct edma_softc *,
+ unsigned int, const struct edma_param *);
+static bool edma_bit_isset(uint32_t *, unsigned int);
+static void edma_bit_set(uint32_t *, unsigned int);
+static void edma_bit_clr(uint32_t *, unsigned int);
+
+CFATTACH_DECL_NEW(ti_edma, sizeof(struct edma_softc),
+ edma_match, edma_attach, NULL, NULL);
+
+#define EDMA_READ(sc, reg) \
+ bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))
+#define EDMA_WRITE(sc, reg, val) \
+ bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
+
+static const char * compatible[] = {
+ "ti,edma3-tpcc",
+ NULL
+};
+
+static int
+edma_match(device_t parent, cfdata_t match, void *aux)
+{
+ struct fdt_attach_args * const faa = aux;
+
+ return of_match_compatible(faa->faa_phandle, compatible);
+}
+
+static void
+edma_attach(device_t parent, device_t self, void *aux)
+{
+ struct edma_softc *sc = device_private(self);
+ struct fdt_attach_args * const faa = aux;
+ const int phandle = faa->faa_phandle;
+ char intrstr[128];
+ bus_addr_t addr;
+ bus_size_t size;
+ int idx;
+
+ if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
+ aprint_error(": couldn't get registers\n");
+ return;
+ }
+
+ if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
+ aprint_error(": failed to decode interrupt\n");
+ return;
+ }
+
+ sc->sc_dev = self;
+ sc->sc_iot = faa->faa_bst;
+ mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
+ if (bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh) != 0) {
+ aprint_error(": couldn't map registers\n");
+ return;
+ }
+
+ aprint_naive("\n");
+ aprint_normal(": EDMA Channel Controller\n");
+
+ for (idx = 0; idx < NUM_DMA_CHANNELS; idx++) {
+ struct edma_channel *ch = &sc->sc_dma[idx];
+ ch->ch_sc = sc;
+ ch->ch_type = EDMA_TYPE_DMA;
+ ch->ch_index = idx;
+ ch->ch_callback = NULL;
+ ch->ch_callbackarg = NULL;
+ ch->ch_nparams = 0;
+ }
+
+ if (ti_prcm_enable_hwmod(phandle, 0) != 0) {
+ aprint_error_dev(self, "couldn't enable module\n");
+ return;
+ }
+
+ edma_init(sc);
+
+ sc->sc_ih = fdtbus_intr_establish_byname(phandle, "edma3_ccint",
+ IPL_VM, FDT_INTR_MPSAFE, edma_intr, sc);
+ if (sc->sc_ih == NULL) {
+ aprint_error_dev(self, "failed to establish interrupt\n");
+ return;
+ }
+ aprint_normal_dev(self, "interrupting on %s\n", intrstr);
+}
+
+/*
+ * Hardware initialization
+ */
+static void
+edma_init(struct edma_softc *sc)
+{
+ struct edma_param param;
+ uint32_t val;
+ int idx;
+
+ val = EDMA_READ(sc, EDMA_CCCFG_REG);
+ if (val & EDMA_CCCFG_CHMAP_EXIST) {
+ for (idx = 0; idx < NUM_DMA_CHANNELS; idx++) {
+ EDMA_WRITE(sc, EDMA_DCHMAP_REG(idx),
+ __SHIFTIN(0, EDMA_DCHMAP_PAENTRY));
+ }
+ }
+
+ memset(¶m, 0, sizeof(param));
+ param.ep_bcnt = 1;
+ for (idx = 0; idx < NUM_PARAM_SETS; idx++) {
+ edma_write_param(sc, idx, ¶m);
+ }
+
+ /* reserve PaRAM entry 0 for dummy slot */
+ edma_bit_set(sc->sc_parammask, 0);
+ for (idx = 1; idx <= 32; idx++) {
+ edma_bit_set(sc->sc_parammask, idx);
+ }
+}
+
+/*
+ * Write a PaRAM entry
+ */
+static void
+edma_write_param(struct edma_softc *sc,
Home |
Main Index |
Thread Index |
Old Index