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[src/netbsd-8]: src/sys/dev/mii Pull up the following revisions, requested by...
details: https://anonhg.NetBSD.org/src/rev/9c1b16a42ef1
branches: netbsd-8
changeset: 460468:9c1b16a42ef1
user: martin <martin%NetBSD.org@localhost>
date: Thu Oct 24 15:58:45 2019 +0000
description:
Pull up the following revisions, requested by msaitoh in ticket #1414:
sys/dev/mii/ciphy.c 1.34-1.37 via patch
sys/dev/mii/miidevs 1.158
- Indicate master mode if the negotiated result say so.
- Call mii_phy_flowstatus() to show the flow setting.
- Match a lot of Cicada and Vitesse devices correctly.
- Add support for VSC8221, VSC8234 and VSC8641.
- KNF
diffstat:
sys/dev/mii/ciphy.c | 90 ++++++++++++++++++++++++++--------------------------
sys/dev/mii/miidevs | 29 +++++++++-------
2 files changed, 61 insertions(+), 58 deletions(-)
diffs (254 lines):
diff -r f9fce084180c -r 9c1b16a42ef1 sys/dev/mii/ciphy.c
--- a/sys/dev/mii/ciphy.c Thu Oct 24 15:54:46 2019 +0000
+++ b/sys/dev/mii/ciphy.c Thu Oct 24 15:58:45 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ciphy.c,v 1.26.10.2 2019/09/01 10:19:04 martin Exp $ */
+/* $NetBSD: ciphy.c,v 1.26.10.3 2019/10/24 15:58:45 martin Exp $ */
/*-
* Copyright (c) 2004
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ciphy.c,v 1.26.10.2 2019/09/01 10:19:04 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ciphy.c,v 1.26.10.3 2019/10/24 15:58:45 martin Exp $");
/*
* Driver for the Cicada CS8201 10/100/1000 copper PHY.
@@ -74,35 +74,35 @@
};
static const struct mii_phydesc ciphys[] = {
- { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201,
- MII_STR_CICADA_CS8201 },
+ { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8201,
+ MII_STR_xxCICADA_CIS8201 },
- { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201A,
- MII_STR_CICADA_CS8201A },
+ { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8201A,
+ MII_STR_xxCICADA_CIS8201A },
- { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201B,
- MII_STR_CICADA_CS8201B },
+ { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8201B,
+ MII_STR_xxCICADA_CIS8201B },
- { MII_OUI_CICADA, MII_MODEL_CICADA_CS8204,
- MII_STR_CICADA_CS8204 },
+ { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CIS8204,
+ MII_STR_xxCICADA_CIS8204 },
- { MII_OUI_CICADA, MII_MODEL_CICADA_VSC8211,
- MII_STR_CICADA_VSC8211 },
+ { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8211,
+ MII_STR_xxCICADA_VSC8211 },
- { MII_OUI_CICADA, MII_MODEL_CICADA_CS8244,
- MII_STR_CICADA_CS8244 },
+ { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8221,
+ MII_STR_xxCICADA_VSC8221 },
- { MII_OUI_xxCICADA, MII_MODEL_CICADA_CS8201,
- MII_STR_CICADA_CS8201 },
+ { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8234,
+ MII_STR_xxCICADA_VSC8234 },
- { MII_OUI_xxCICADA, MII_MODEL_CICADA_CS8201A,
- MII_STR_CICADA_CS8201A },
+ { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8244,
+ MII_STR_xxCICADA_VSC8244 },
- { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CS8201B,
- MII_STR_xxCICADA_CS8201B },
+ { MII_OUI_xxVITESSE, MII_MODEL_xxVITESSE_VSC8601,
+ MII_STR_xxVITESSE_VSC8601 },
- { MII_OUI_VITESSE, MII_MODEL_VITESSE_VSC8601,
- MII_STR_VITESSE_VSC8601 },
+ { MII_OUI_xxVITESSE, MII_MODEL_xxVITESSE_VSC8641,
+ MII_STR_xxVITESSE_VSC8641 },
{ 0, 0,
NULL },
@@ -231,9 +231,8 @@
if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
PHY_WRITE(sc, MII_100T2CR,
gig | GTCR_MAN_MS | GTCR_ADV_MS);
- } else {
+ } else
PHY_WRITE(sc, MII_100T2CR, gig | GTCR_MAN_MS);
- }
break;
case IFM_NONE:
PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
@@ -316,7 +315,7 @@
ciphy_status(struct mii_softc *sc)
{
struct mii_data *mii = sc->mii_pdata;
- int bmsr, bmcr;
+ int bmsr, bmcr, gtsr;
mii->mii_media_status = IFM_AVALID;
mii->mii_media_active = IFM_ETHER;
@@ -357,20 +356,23 @@
}
if (bmsr & CIPHY_AUXCSR_FDX)
- mii->mii_media_active |= IFM_FDX;
+ mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
else
mii->mii_media_active |= IFM_HDX;
- return;
+ if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
+ gtsr = PHY_READ(sc, MII_100T2SR);
+ if ((gtsr & GTSR_MS_RES) != 0)
+ mii->mii_media_active |= IFM_ETH_MASTER;
+ }
}
static void
ciphy_reset(struct mii_softc *sc)
{
+
mii_phy_reset(sc);
DELAY(1000);
-
- return;
}
#define PHY_SETBIT(x, y, z) \
@@ -395,9 +397,8 @@
}
switch (model) {
- case MII_MODEL_CICADA_CS8201:
- case MII_MODEL_CICADA_CS8204:
-
+ case MII_MODEL_xxCICADA_CIS8201:
+ case MII_MODEL_xxCICADA_CIS8204:
/* Turn off "aux mode" (whatever that means) */
PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
@@ -406,40 +407,39 @@
* when using MII in full duplex mode.
*/
if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
- (status & CIPHY_AUXCSR_FDX)) {
+ (status & CIPHY_AUXCSR_FDX))
PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
- } else {
+ else
PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
- }
/* Enable link/activity LED blink. */
PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
break;
- case MII_MODEL_CICADA_CS8201A:
- case MII_MODEL_CICADA_CS8201B:
-
+ case MII_MODEL_xxCICADA_CIS8201A:
+ case MII_MODEL_xxCICADA_CIS8201B:
/*
* Work around speed polling bug in VT3119/VT3216
* when using MII in full duplex mode.
*/
if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
- (status & CIPHY_AUXCSR_FDX)) {
+ (status & CIPHY_AUXCSR_FDX))
PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
- } else
+ else
PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
break;
- case MII_MODEL_CICADA_VSC8211:
- case MII_MODEL_CICADA_CS8244:
- case MII_MODEL_VITESSE_VSC8601:
+ case MII_MODEL_xxCICADA_VSC8211:
+ case MII_MODEL_xxCICADA_VSC8221:
+ case MII_MODEL_xxCICADA_VSC8234:
+ case MII_MODEL_xxCICADA_VSC8244:
+ case MII_MODEL_xxVITESSE_VSC8601:
+ case MII_MODEL_xxVITESSE_VSC8641:
break;
default:
aprint_error_dev(sc->mii_dev, "unknown CICADA PHY model %x\n",
model);
break;
}
-
- return;
}
diff -r f9fce084180c -r 9c1b16a42ef1 sys/dev/mii/miidevs
--- a/sys/dev/mii/miidevs Thu Oct 24 15:54:46 2019 +0000
+++ b/sys/dev/mii/miidevs Thu Oct 24 15:58:45 2019 +0000
@@ -1,4 +1,4 @@
-$NetBSD: miidevs,v 1.125.6.6 2019/08/01 14:22:55 martin Exp $
+$NetBSD: miidevs,v 1.125.6.7 2019/10/24 15:58:45 martin Exp $
/*-
* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
@@ -50,10 +50,8 @@
*/
oui AMD 0x00001a Advanced Micro Devices
-oui VITESSE 0x0001c1 Vitesse
oui TRIDIUM 0x0001f0 Tridium
oui DATATRACK 0x0002c6 Data Track Technology
-oui CICADA 0x0003f1 Cicada Semiconductor
oui AGERE 0x00053d Agere
oui BANKSPEED 0x0006b8 Bankspeed Pty
oui NETEXCELL 0x0008bb NetExcell
@@ -111,6 +109,7 @@
oui xxBROADCOM_ALT1 0x0050ef Broadcom Corporation
oui yyINTEL 0x005500 Intel
oui yyASIX 0x007063 Asix Semiconductor
+oui xxVITESSE 0x008083 Vitesse Semiconductor
oui xxPMCSIERRA2 0x009057 PMC-Sierra
oui xxCICADA 0x00c08f Cicada Semiconductor
oui xxNATSEMI 0x1000e8 National Semiconductor
@@ -219,15 +218,17 @@
model BROADCOM4 BCM5725C 0x0038 BCM5725C 1000BASE-T media interface
model xxBROADCOM_ALT1 BCM5906 0x0004 BCM5906 10/100baseTX media interface
-/* Cicada Semiconductor PHYs (now owned by Vitesse?) */
-model CICADA CS8201 0x0001 Cicada CS8201 10/100/1000TX PHY
-model CICADA CS8204 0x0004 Cicada CS8204 10/100/1000TX PHY
-model CICADA VSC8211 0x000b Cicada VSC8211 10/100/1000TX PHY
-model CICADA CS8201A 0x0020 Cicada CS8201 10/100/1000TX PHY
-model CICADA CS8201B 0x0021 Cicada CS8201 10/100/1000TX PHY
-model CICADA CS8244 0x002c Vitesse VSC8244 Quad 10/100/1000BASE-T PHY
+/* Cicada Semiconductor PHYs (-> Vitesse -> Microsemi) */
+
+model xxCICADA CIS8201 0x0001 Cicada CIS8201 10/100/1000TX PHY
+model xxCICADA CIS8204 0x0004 Cicada CIS8204 10/100/1000TX PHY
+model xxCICADA VSC8211 0x000b Cicada VSC8211 10/100/1000TX PHY
model xxCICADA VSC8221 0x0015 Vitesse VSC8221 10/100/1000BASE-T PHY
-model xxCICADA CS8201B 0x0021 Cicada CS8201 10/100/1000TX PHY
+model xxCICADA VSC8224 0x0018 Vitesse VSC8224 10/100/1000BASE-T PHY
+model xxCICADA CIS8201A 0x0020 Cicada CIS8201 10/100/1000TX PHY
+model xxCICADA CIS8201B 0x0021 Cicada CIS8201 10/100/1000TX PHY
+model xxCICADA VSC8234 0x0022 Vitesse VSC8234 10/100/1000TX PHY
+model xxCICADA VSC8244 0x002c Vitesse VSC8244 Quad 10/100/1000BASE-T PHY
/* Davicom Semiconductor PHYs */
/* AMD Am79C873 seems to be a relabeled DM9101 */
@@ -389,8 +390,10 @@
model VIA VT6103 0x0032 VT6103 10/100 PHY
model VIA VT6103_2 0x0034 VT6103 10/100 PHY
-/* Vitesse PHYs */
-model VITESSE VSC8601 0x0002 VSC8601 10/100/1000 PHY
+/* Vitesse PHYs (Now Microsemi) */
+model xxVITESSE VSC8601 0x0002 VSC8601 10/100/1000 PHY
+model xxVITESSE VSC8641 0x0003 Vitesse VSC8641 10/100/1000TX PHY
+model xxVITESSE VSC8501 0x0013 Vitesse VSC8501 10/100/1000TX PHY
/* XaQti Corp. PHYs */
model xxXAQTI XMACII 0x0000 XaQti Corp. XMAC II gigabit interface
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