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[src/trunk]: src/sys/arch/arm/amlogic Use correct register for mpll2_div clock
details: https://anonhg.NetBSD.org/src/rev/44e0555a12ec
branches: trunk
changeset: 458919:44e0555a12ec
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Fri Aug 16 10:36:06 2019 +0000
description:
Use correct register for mpll2_div clock
diffstat:
sys/arch/arm/amlogic/meson8b_clkc.c | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diffs (31 lines):
diff -r b663f15f9b68 -r 44e0555a12ec sys/arch/arm/amlogic/meson8b_clkc.c
--- a/sys/arch/arm/amlogic/meson8b_clkc.c Fri Aug 16 10:33:17 2019 +0000
+++ b/sys/arch/arm/amlogic/meson8b_clkc.c Fri Aug 16 10:36:06 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: meson8b_clkc.c,v 1.4 2019/08/13 09:56:08 skrll Exp $ */
+/* $NetBSD: meson8b_clkc.c,v 1.5 2019/08/16 10:36:06 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: meson8b_clkc.c,v 1.4 2019/08/13 09:56:08 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: meson8b_clkc.c,v 1.5 2019/08/16 10:36:06 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -268,9 +268,9 @@
MESON_CLK_PLL_REG_INVALID, /* ssen */
0),
MESON_CLK_MPLL(MESON8B_CLOCK_MPLL2_DIV, "mpll2_div", "mpll_prediv",
- MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BITS(13,0)), /* sdm */
- MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BIT(15)), /* sdm_enable */
- MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BITS(24,16)), /* n2 */
+ MESON_CLK_PLL_REG(HHI_MPLL_CNTL9, __BITS(13,0)), /* sdm */
+ MESON_CLK_PLL_REG(HHI_MPLL_CNTL9, __BIT(15)), /* sdm_enable */
+ MESON_CLK_PLL_REG(HHI_MPLL_CNTL9, __BITS(24,16)), /* n2 */
MESON_CLK_PLL_REG_INVALID, /* ssen */
0),
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