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[src/trunk]: src/sys/external/bsd/drm2/dist/drm/radeon Use unsigned to avoid ...



details:   https://anonhg.NetBSD.org/src/rev/1bca95ca650b
branches:  trunk
changeset: 458754:1bca95ca650b
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Fri Aug 09 06:27:21 2019 +0000

description:
Use unsigned to avoid undefined behavior. Found by kUBSan.

diffstat:

 sys/external/bsd/drm2/dist/drm/radeon/cikd.h            |  26 ++++++++--------
 sys/external/bsd/drm2/dist/drm/radeon/evergreend.h      |   4 +-
 sys/external/bsd/drm2/dist/drm/radeon/nid.h             |   8 ++--
 sys/external/bsd/drm2/dist/drm/radeon/radeon_mode.h     |   4 +-
 sys/external/bsd/drm2/dist/drm/radeon/radeon_reg.h      |  10 +++---
 sys/external/bsd/drm2/dist/drm/radeon/radeon_si_smc.c   |   8 ++--
 sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v1_0.c |   6 +-
 sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v2_2.c |   6 +-
 sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v4_2.c |   6 +-
 sys/external/bsd/drm2/dist/drm/radeon/sid.h             |  16 +++++-----
 10 files changed, 47 insertions(+), 47 deletions(-)

diffs (truncated from 374 to 300 lines):

diff -r d75f712cd7e1 -r 1bca95ca650b sys/external/bsd/drm2/dist/drm/radeon/cikd.h
--- a/sys/external/bsd/drm2/dist/drm/radeon/cikd.h      Fri Aug 09 02:56:51 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/cikd.h      Fri Aug 09 06:27:21 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cikd.h,v 1.2 2018/08/27 04:58:35 riastradh Exp $       */
+/*     $NetBSD: cikd.h,v 1.3 2019/08/09 06:27:21 msaitoh Exp $ */
 
 /*
  * Copyright 2012 Advanced Micro Devices, Inc.
@@ -809,7 +809,7 @@
 #       define IH_WPTR_WRITEBACK_ENABLE                   (1 << 8)
 #       define IH_WPTR_WRITEBACK_TIMER(x)                 ((x) << 9) /* log2 */
 #       define IH_WPTR_OVERFLOW_ENABLE                    (1 << 16)
-#       define IH_WPTR_OVERFLOW_CLEAR                     (1 << 31)
+#       define IH_WPTR_OVERFLOW_CLEAR                     (1U << 31)
 #define IH_RB_BASE                                        0x3e04
 #define IH_RB_RPTR                                        0x3e08
 #define IH_RB_WPTR                                        0x3e0c
@@ -1308,7 +1308,7 @@
 #define                RB_BLKSZ(x)                                     ((x) << 8)
 #define                BUF_SWAP_32BIT                                  (2 << 16)
 #define                RB_NO_UPDATE                                    (1 << 27)
-#define                RB_RPTR_WR_ENA                                  (1 << 31)
+#define                RB_RPTR_WR_ENA                                  (1U << 31)
 
 #define        CP_RB0_RPTR_ADDR                                0xC10C
 #define                RB_RPTR_SWAP_32BIT                              (2 << 0)
@@ -1357,7 +1357,7 @@
 #define CP_CPF_DEBUG                                    0xC200
 
 #define CP_PQ_WPTR_POLL_CNTL                            0xC20C
-#define                WPTR_POLL_EN                            (1 << 31)
+#define                WPTR_POLL_EN                            (1U << 31)
 
 #define CP_ME1_PIPE0_INT_CNTL                           0xC214
 #define CP_ME1_PIPE1_INT_CNTL                           0xC218
@@ -1518,7 +1518,7 @@
 #define                DOORBELL_SOURCE                         (1 << 28)
 #define                DOORBELL_SCHD_HIT                       (1 << 29)
 #define                DOORBELL_EN                             (1 << 30)
-#define                DOORBELL_HIT                            (1 << 31)
+#define                DOORBELL_HIT                            (1U << 31)
 #define CP_HQD_PQ_WPTR                                    0xC954
 #define CP_HQD_PQ_CONTROL                                 0xC958
 #define                QUEUE_SIZE(x)                           ((x) << 0)
@@ -1530,7 +1530,7 @@
 #define                UNORD_DISPATCH                          (1 << 28)
 #define                ROQ_PQ_IB_FLIP                          (1 << 29)
 #define                PRIV_STATE                              (1 << 30)
-#define                KMD_QUEUE                               (1 << 31)
+#define                KMD_QUEUE                               (1U << 31)
 
 #define CP_HQD_IB_BASE_ADDR                            0xC95Cu
 #define CP_HQD_IB_BASE_ADDR_HI                 0xC960u
@@ -1634,7 +1634,7 @@
 #define                SE_INDEX(x)                             ((x) << 16)
 #define                SH_BROADCAST_WRITES                     (1 << 29)
 #define                INSTANCE_BROADCAST_WRITES               (1 << 30)
-#define                SE_BROADCAST_WRITES                     (1 << 31)
+#define                SE_BROADCAST_WRITES                     (1U << 31)
 
 #define        VGT_ESGS_RING_SIZE                              0x30900
 #define        VGT_GSVS_RING_SIZE                              0x30904
@@ -1661,8 +1661,8 @@
 #define                CGTS_OVERRIDE                           (1 << 21)
 #define                CGTS_LS_OVERRIDE                        (1 << 22)
 #define                ON_MONITOR_ADD_EN                       (1 << 23)
-#define                ON_MONITOR_ADD(x)                       ((x) << 24)
-#define                ON_MONITOR_ADD_MASK                     (0xff << 24)
+#define                ON_MONITOR_ADD(x)                       ((uint32_t)(x) << 24)
+#define                ON_MONITOR_ADD_MASK                     (0xffU << 24)
 
 #define        CGTS_TCC_DISABLE                                0x3c00c
 #define        CGTS_USER_TCC_DISABLE                           0x3c010
@@ -1674,10 +1674,10 @@
 /*
  * PM4
  */
-#define        PACKET_TYPE0    0
-#define        PACKET_TYPE1    1
-#define        PACKET_TYPE2    2
-#define        PACKET_TYPE3    3
+#define        PACKET_TYPE0    0U
+#define        PACKET_TYPE1    1U
+#define        PACKET_TYPE2    2U
+#define        PACKET_TYPE3    3U
 
 #define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
 #define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
diff -r d75f712cd7e1 -r 1bca95ca650b sys/external/bsd/drm2/dist/drm/radeon/evergreend.h
--- a/sys/external/bsd/drm2/dist/drm/radeon/evergreend.h        Fri Aug 09 02:56:51 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/evergreend.h        Fri Aug 09 06:27:21 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: evergreend.h,v 1.2 2018/08/27 04:58:36 riastradh Exp $ */
+/*     $NetBSD: evergreend.h,v 1.3 2019/08/09 06:27:21 msaitoh Exp $   */
 
 /*
  * Copyright 2010 Advanced Micro Devices, Inc.
@@ -1415,7 +1415,7 @@
 #define CAYMAN_DMA1_CNTL                                  0xd82c
 
 /* async DMA packets */
-#define DMA_PACKET(cmd, sub_cmd, n) ((((cmd) & 0xF) << 28) |    \
+#define DMA_PACKET(cmd, sub_cmd, n) ((((uint32_t)(cmd) & 0xF) << 28) | \
                                     (((sub_cmd) & 0xFF) << 20) |\
                                     (((n) & 0xFFFFF) << 0))
 #define GET_DMA_CMD(h) (((h) & 0xf0000000) >> 28)
diff -r d75f712cd7e1 -r 1bca95ca650b sys/external/bsd/drm2/dist/drm/radeon/nid.h
--- a/sys/external/bsd/drm2/dist/drm/radeon/nid.h       Fri Aug 09 02:56:51 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/nid.h       Fri Aug 09 06:27:21 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: nid.h,v 1.2 2018/08/27 04:58:36 riastradh Exp $        */
+/*     $NetBSD: nid.h,v 1.3 2019/08/09 06:27:21 msaitoh Exp $  */
 
 /*
  * Copyright 2010 Advanced Micro Devices, Inc.
@@ -869,7 +869,7 @@
 #define AUX_SW_DATA_RW                                 (1 << 0)
 #define AUX_SW_DATA_MASK(x)                            (((x) & 0xff) << 8)
 #define AUX_SW_DATA_INDEX(x)                           (((x) & 0x1f) << 16)
-#define AUX_SW_AUTOINCREMENT_DISABLE                   (1 << 31)
+#define AUX_SW_AUTOINCREMENT_DISABLE                   (1U << 31)
 
 #define        LB_SYNC_RESET_SEL                               0x6b28
 #define                LB_SYNC_RESET_SEL_MASK                  (3 << 0)
@@ -1319,7 +1319,7 @@
 #define DMA_IB_CNTL                                       0xd024
 #       define DMA_IB_ENABLE                              (1 << 0)
 #       define DMA_IB_SWAP_ENABLE                         (1 << 4)
-#       define CMD_VMID_FORCE                             (1 << 31)
+#       define CMD_VMID_FORCE                             (1U << 31)
 #define DMA_IB_RPTR                                       0xd028
 #define DMA_CNTL                                          0xd02c
 #       define TRAP_ENABLE                                (1 << 0)
@@ -1335,7 +1335,7 @@
 #define DMA_TILING_CONFIG                                0xd0b8
 #define DMA_MODE                                          0xd0bc
 
-#define DMA_PACKET(cmd, t, s, n)       ((((cmd) & 0xF) << 28) |        \
+#define DMA_PACKET(cmd, t, s, n)       ((((uint32_t)(cmd) & 0xF) << 28) | \
                                         (((t) & 0x1) << 23) |          \
                                         (((s) & 0x1) << 22) |          \
                                         (((n) & 0xFFFFF) << 0))
diff -r d75f712cd7e1 -r 1bca95ca650b sys/external/bsd/drm2/dist/drm/radeon/radeon_mode.h
--- a/sys/external/bsd/drm2/dist/drm/radeon/radeon_mode.h       Fri Aug 09 02:56:51 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/radeon_mode.h       Fri Aug 09 06:27:21 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: radeon_mode.h,v 1.4 2018/08/27 15:13:05 riastradh Exp $        */
+/*     $NetBSD: radeon_mode.h,v 1.5 2019/08/09 06:27:21 msaitoh Exp $  */
 
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
@@ -693,7 +693,7 @@
 
 /* Driver internal use only flags of radeon_get_crtc_scanoutpos() */
 #define USE_REAL_VBLANKSTART           (1 << 30)
-#define GET_DISTANCE_TO_VBLANKSTART    (1 << 31)
+#define GET_DISTANCE_TO_VBLANKSTART    (1U << 31)
 
 extern void
 radeon_add_atom_connector(struct drm_device *dev,
diff -r d75f712cd7e1 -r 1bca95ca650b sys/external/bsd/drm2/dist/drm/radeon/radeon_reg.h
--- a/sys/external/bsd/drm2/dist/drm/radeon/radeon_reg.h        Fri Aug 09 02:56:51 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/radeon_reg.h        Fri Aug 09 06:27:21 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: radeon_reg.h,v 1.2 2018/08/27 04:58:36 riastradh Exp $ */
+/*     $NetBSD: radeon_reg.h,v 1.3 2019/08/09 06:27:21 msaitoh Exp $   */
 
 /*
  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
@@ -3715,10 +3715,10 @@
 #define RADEON_CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
 #define R100_CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
 #define R600_CP_PACKET0_GET_REG(h) (((h) & 0xFFFF) << 2)
-#define RADEON_PACKET_TYPE0 0
-#define RADEON_PACKET_TYPE1 1
-#define RADEON_PACKET_TYPE2 2
-#define RADEON_PACKET_TYPE3 3
+#define RADEON_PACKET_TYPE0 0U
+#define RADEON_PACKET_TYPE1 1U
+#define RADEON_PACKET_TYPE2 2U
+#define RADEON_PACKET_TYPE3 3U
 
 #define RADEON_PACKET3_NOP 0x10
 
diff -r d75f712cd7e1 -r 1bca95ca650b sys/external/bsd/drm2/dist/drm/radeon/radeon_si_smc.c
--- a/sys/external/bsd/drm2/dist/drm/radeon/radeon_si_smc.c     Fri Aug 09 02:56:51 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/radeon_si_smc.c     Fri Aug 09 06:27:21 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: radeon_si_smc.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $      */
+/*     $NetBSD: radeon_si_smc.c,v 1.2 2019/08/09 06:27:21 msaitoh Exp $        */
 
 /*
  * Copyright 2011 Advanced Micro Devices, Inc.
@@ -25,7 +25,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: radeon_si_smc.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: radeon_si_smc.c,v 1.2 2019/08/09 06:27:21 msaitoh Exp $");
 
 #include <linux/firmware.h>
 #include "drmP.h"
@@ -67,7 +67,7 @@
        spin_lock_irqsave(&rdev->smc_idx_lock, flags);
        while (byte_count >= 4) {
                /* SMC address space is BE */
-               data = (src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3];
+               data = ((u32)src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3];
 
                ret = si_set_smc_sram_address(rdev, addr, limit);
                if (ret)
@@ -271,7 +271,7 @@
        WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0);
        while (ucode_size >= 4) {
                /* SMC address space is BE */
-               data = (src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3];
+               data = ((u32)src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3];
 
                WREG32(SMC_IND_DATA_0, data);
 
diff -r d75f712cd7e1 -r 1bca95ca650b sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v1_0.c
--- a/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v1_0.c   Fri Aug 09 02:56:51 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v1_0.c   Fri Aug 09 06:27:21 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: radeon_uvd_v1_0.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $    */
+/*     $NetBSD: radeon_uvd_v1_0.c,v 1.2 2019/08/09 06:27:21 msaitoh Exp $      */
 
 /*
  * Copyright 2013 Advanced Micro Devices, Inc.
@@ -25,7 +25,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: radeon_uvd_v1_0.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: radeon_uvd_v1_0.c,v 1.2 2019/08/09 06:27:21 msaitoh Exp $");
 
 #include <linux/firmware.h>
 #include <drm/drmP.h>
@@ -366,7 +366,7 @@
 
        /* programm the 4GB memory segment for rptr and ring buffer */
        WREG32(UVD_LMI_EXT40_ADDR, upper_32_bits(ring->gpu_addr) |
-                                  (0x7 << 16) | (0x1 << 31));
+                                  (0x7 << 16) | (0x1U << 31));
 
        /* Initialize the ring buffer's read and write pointers */
        WREG32(UVD_RBC_RB_RPTR, 0x0);
diff -r d75f712cd7e1 -r 1bca95ca650b sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v2_2.c
--- a/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v2_2.c   Fri Aug 09 02:56:51 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v2_2.c   Fri Aug 09 06:27:21 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: radeon_uvd_v2_2.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $    */
+/*     $NetBSD: radeon_uvd_v2_2.c,v 1.2 2019/08/09 06:27:21 msaitoh Exp $      */
 
 /*
  * Copyright 2013 Advanced Micro Devices, Inc.
@@ -25,7 +25,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: radeon_uvd_v2_2.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: radeon_uvd_v2_2.c,v 1.2 2019/08/09 06:27:21 msaitoh Exp $");
 
 #include <linux/firmware.h>
 #include <drm/drmP.h>
@@ -136,7 +136,7 @@
 
        /* bits 32-39 */
        addr = (rdev->uvd.gpu_addr >> 32) & 0xFF;
-       WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));
+       WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1U << 31));
 
        /* tell firmware which hardware it is running on */
        switch (rdev->family) {
diff -r d75f712cd7e1 -r 1bca95ca650b sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v4_2.c
--- a/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v4_2.c   Fri Aug 09 02:56:51 2019 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/radeon_uvd_v4_2.c   Fri Aug 09 06:27:21 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: radeon_uvd_v4_2.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $    */
+/*     $NetBSD: radeon_uvd_v4_2.c,v 1.2 2019/08/09 06:27:21 msaitoh Exp $      */
 
 /*
  * Copyright 2013 Advanced Micro Devices, Inc.
@@ -25,7 +25,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: radeon_uvd_v4_2.c,v 1.1 2018/08/27 14:38:20 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: radeon_uvd_v4_2.c,v 1.2 2019/08/09 06:27:21 msaitoh Exp $");
 
 #include <linux/firmware.h>
 #include <drm/drmP.h>
@@ -67,7 +67,7 @@
 
        /* bits 32-39 */
        addr = (rdev->uvd.gpu_addr >> 32) & 0xFF;
-       WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));
+       WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1U << 31));
 



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