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[src/trunk]: src/sys/arch/x86/x86 Add TODO comments to support MSI multiple v...
details: https://anonhg.NetBSD.org/src/rev/504e0229b980
branches: trunk
changeset: 456995:504e0229b980
user: knakahara <knakahara%NetBSD.org@localhost>
date: Wed Jun 05 04:31:37 2019 +0000
description:
Add TODO comments to support MSI multiple vectors on x86 systems.
diffstat:
sys/arch/x86/x86/intr.c | 17 +++++++++++++++--
1 files changed, 15 insertions(+), 2 deletions(-)
diffs (38 lines):
diff -r c28282a049ff -r 504e0229b980 sys/arch/x86/x86/intr.c
--- a/sys/arch/x86/x86/intr.c Wed Jun 05 03:49:07 2019 +0000
+++ b/sys/arch/x86/x86/intr.c Wed Jun 05 04:31:37 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.c,v 1.144 2019/02/15 08:54:01 nonaka Exp $ */
+/* $NetBSD: intr.c,v 1.145 2019/06/05 04:31:37 knakahara Exp $ */
/*
* Copyright (c) 2007, 2008, 2009 The NetBSD Foundation, Inc.
@@ -133,7 +133,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.144 2019/02/15 08:54:01 nonaka Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.145 2019/06/05 04:31:37 knakahara Exp $");
#include "opt_intrdebug.h"
#include "opt_multiprocessor.h"
@@ -661,6 +661,19 @@
if (pic == &i8259_pic) {
idtvec = ICU_OFFSET + pin;
} else {
+ /*
+ * TODO to support MSI (not MSI-X) multiple vectors
+ *
+ * PCI Local Bus Specification Revision 3.0 says the devices
+ * which use MSI multiple vectors increment the low order bits
+ * of MSI message data.
+ * On the other hand, Intel SDM "10.11.2 Message Data Register
+ * Format" says the 7:0 bits of MSI message data mean Interrupt
+ * Descriptor Table(IDT) vector.
+ * As the result of these two documents, the IDT vectors which
+ * are used by a device using MSI multiple vectors must be
+ * continuous.
+ */
idtvec = idt_vec_alloc(APIC_LEVEL(level), IDT_INTR_HIGH);
}
if (idtvec == 0) {
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