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[src/trunk]: src/sys/arch/hppa/hppa Trailing whitespace
details: https://anonhg.NetBSD.org/src/rev/672f5d6b43d6
branches: trunk
changeset: 455847:672f5d6b43d6
user: skrll <skrll%NetBSD.org@localhost>
date: Mon Apr 15 20:45:08 2019 +0000
description:
Trailing whitespace
diffstat:
sys/arch/hppa/hppa/autoconf.c | 22 +++++++++---------
sys/arch/hppa/hppa/copy.S | 4 +-
sys/arch/hppa/hppa/db_machdep.c | 6 ++--
sys/arch/hppa/hppa/fpemu.S | 6 ++--
sys/arch/hppa/hppa/fpu.c | 44 +++++++++++++++++++-------------------
sys/arch/hppa/hppa/hpt.h | 40 +++++++++++++++++-----------------
sys/arch/hppa/hppa/idle_machdep.c | 6 ++--
sys/arch/hppa/hppa/intr.c | 20 ++++++++--------
sys/arch/hppa/hppa/ipifuncs.c | 6 ++--
sys/arch/hppa/hppa/kgdb_hppa.c | 18 +++++++-------
sys/arch/hppa/hppa/lock_stubs.S | 4 +-
sys/arch/hppa/hppa/locore.S | 10 ++++----
sys/arch/hppa/hppa/machdep.h | 8 +++---
sys/arch/hppa/hppa/mainbus.c | 12 +++++-----
sys/arch/hppa/hppa/pim.h | 4 +-
sys/arch/hppa/hppa/sig_machdep.c | 6 ++--
sys/arch/hppa/hppa/sigcode.S | 8 +++---
sys/arch/hppa/hppa/support.S | 6 ++--
sys/arch/hppa/hppa/trap.c | 28 ++++++++++++------------
19 files changed, 129 insertions(+), 129 deletions(-)
diffs (truncated from 939 to 300 lines):
diff -r 35fc9ab98f12 -r 672f5d6b43d6 sys/arch/hppa/hppa/autoconf.c
--- a/sys/arch/hppa/hppa/autoconf.c Mon Apr 15 20:40:53 2019 +0000
+++ b/sys/arch/hppa/hppa/autoconf.c Mon Apr 15 20:45:08 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: autoconf.c,v 1.2 2014/03/26 17:57:17 christos Exp $ */
+/* $NetBSD: autoconf.c,v 1.3 2019/04/15 20:45:08 skrll Exp $ */
/* $OpenBSD: autoconf.c,v 1.15 2001/06/25 00:43:10 mickey Exp $ */
@@ -86,7 +86,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.2 2014/03/26 17:57:17 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.3 2019/04/15 20:45:08 skrll Exp $");
#include "opt_kgdb.h"
#include "opt_useleds.h"
@@ -271,12 +271,12 @@
/* Set the LEDs. */
hppa_led_ctl(-1, leds, 0);
-
+
/* NB: this assumes _HPPA_LED_FREQ is a power of two. */
led_cycle = (led_cycle + 1) & (_HPPA_LED_FREQ - 1);
callout_reset(&hppa_led_callout, hz / _HPPA_LED_FREQ,
hppa_led_blinker, (void *) led_cycle);
-
+
}
#endif /* USELEDS */
@@ -405,7 +405,7 @@
* a ppb.
*/
struct pci_attach_args *paa = (struct pci_attach_args*)aux;
-
+
if (paa->pa_device == PAGE0->mem_boot.pz_dp.dp_bc[3] &&
paa->pa_function == PAGE0->mem_boot.pz_dp.dp_bc[4]) {
/*
@@ -436,7 +436,7 @@
boot_device == device_parent(pdev)) {
struct scsipibus_attach_args *saa = aux;
struct scsipi_periph *p = saa->sa_periph;
-
+
if (p->periph_target == PAGE0->mem_boot.pz_dp.dp_layers[0] &&
p->periph_lun == PAGE0->mem_boot.pz_dp.dp_layers[1]) {
/* This is the boot device. */
@@ -489,7 +489,7 @@
if (ca->ca_hpabase == 0)
return;
-
+
aprint_debug(">> Walking bus at HPA 0x%lx\n", ca->ca_hpabase);
for (i = 0; i < ca->ca_nmodules; i++) {
@@ -631,7 +631,7 @@
if (dev)
hm->hm_registered = true;
-
+
}
}
@@ -668,7 +668,7 @@
{
struct hppa_pdcmodule *nhm, *ahm;
int i;
-
+
nhm = kmem_zalloc(sizeof(*nhm), KM_SLEEP);
nhm->hm_registered = false;
@@ -696,7 +696,7 @@
hm_link) {
int check;
int j, k;
-
+
for (j = 0; j < 6; j++) {
if (ahm->hm_dp.dp_bc[j] != -1)
break;
@@ -749,7 +749,7 @@
int error;
error = pdcproc_memmap(&pdc_memmap, devp);
-
+
if (error < 0)
return NULL;
diff -r 35fc9ab98f12 -r 672f5d6b43d6 sys/arch/hppa/hppa/copy.S
--- a/sys/arch/hppa/hppa/copy.S Mon Apr 15 20:40:53 2019 +0000
+++ b/sys/arch/hppa/hppa/copy.S Mon Apr 15 20:45:08 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: copy.S,v 1.23 2019/04/06 03:06:25 thorpej Exp $ */
+/* $NetBSD: copy.S,v 1.24 2019/04/15 20:45:08 skrll Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -310,7 +310,7 @@
nop
nop
nop
-
+
/* End stack calling convention. */
ldw HPPA_FRAME_CRP(%r3), %rp
ldo HPPA_FRAME_SIZE(%r3), %sp
diff -r 35fc9ab98f12 -r 672f5d6b43d6 sys/arch/hppa/hppa/db_machdep.c
--- a/sys/arch/hppa/hppa/db_machdep.c Mon Apr 15 20:40:53 2019 +0000
+++ b/sys/arch/hppa/hppa/db_machdep.c Mon Apr 15 20:45:08 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.7 2012/04/02 13:18:04 skrll Exp $ */
+ /* $NetBSD: db_machdep.c,v 1.8 2019/04/15 20:45:08 skrll Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.7 2012/04/02 13:18:04 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.8 2019/04/15 20:45:08 skrll Exp $");
#include <sys/param.h>
#include <sys/lwp.h>
@@ -192,7 +192,7 @@
db_printf("\n");
db_printf("Other state\n");
db_printf("eiem: %08x\n", tf->tf_eiem);
-
+
snprintb(buf, sizeof(buf), PSW_BITS, tf->tf_ipsw);
db_printf("ipsw: %s\n", buf);
db_printf("flags: %08x\n", tf->tf_flags);
diff -r 35fc9ab98f12 -r 672f5d6b43d6 sys/arch/hppa/hppa/fpemu.S
--- a/sys/arch/hppa/hppa/fpemu.S Mon Apr 15 20:40:53 2019 +0000
+++ b/sys/arch/hppa/hppa/fpemu.S Mon Apr 15 20:45:08 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: fpemu.S,v 1.6 2009/11/03 05:07:26 snj Exp $ */
+/* $NetBSD: fpemu.S,v 1.7 2019/04/15 20:45:08 skrll Exp $ */
/* $OpenBSD: fpemu.S,v 1.4 2001/03/29 02:18:45 mickey Exp $ */
@@ -88,7 +88,7 @@
comib,= 1, %arg3, L$fpu_cln1
nop
extru %arg0, 16, 2, %r31
-
+
L$fpu_cln1:
/*
* theoreticaly we would need to determine the fpu instruction
@@ -179,7 +179,7 @@
L$fpemu0c_0_4: /* fsqrt */
/* quad not implemented */
FP_TABLE2(fsqrt,sgl,dbl,invalid,invalid)
-
+
L$fpemu0c_0_5: /* frnd */
/* quad not implemented */
FP_TABLE2(frnd,sgl,dbl,invalid,quad)
diff -r 35fc9ab98f12 -r 672f5d6b43d6 sys/arch/hppa/hppa/fpu.c
--- a/sys/arch/hppa/hppa/fpu.c Mon Apr 15 20:40:53 2019 +0000
+++ b/sys/arch/hppa/hppa/fpu.c Mon Apr 15 20:45:08 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.25 2018/11/14 10:58:04 skrll Exp $ */
+/* $NetBSD: fpu.c,v 1.26 2019/04/15 20:45:08 skrll Exp $ */
/*
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.25 2018/11/14 10:58:04 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.26 2019/04/15 20:45:08 skrll Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -85,13 +85,13 @@
static int hppa_fpu_ls(struct trapframe *, struct lwp *);
/*
- * Given a trapframe and a general register number, the
+ * Given a trapframe and a general register number, the
* FRAME_REG macro returns a pointer to that general
- * register. The _frame_reg_positions array is a lookup
- * table, since the general registers aren't in order
+ * register. The _frame_reg_positions array is a lookup
+ * table, since the general registers aren't in order
* in a trapframe.
- *
- * NB: this more or less assumes that all members of
+ *
+ * NB: this more or less assumes that all members of
* struct trapframe are u_ints.
*/
#define FRAME_REG(f, reg, r0) \
@@ -161,9 +161,9 @@
*/
/*
- * The PA-RISC 1.1 Architecture manual is
- * pretty clear that the copr,0,0 must be
- * wrapped in double word stores of fr0,
+ * The PA-RISC 1.1 Architecture manual is
+ * pretty clear that the copr,0,0 must be
+ * wrapped in double word stores of fr0,
* otherwise its operation is undefined.
*/
__asm volatile(
@@ -182,7 +182,7 @@
*/
fpu_csw = 0;
curcpu()->ci_fpu_state = 0;
- mtctl(ccr_enable & (CCR_MASK ^ HPPA_FPUS), CR_CCR);
+ mtctl(ccr_enable & (CCR_MASK ^ HPPA_FPUS), CR_CCR);
fpu_version = vers[0];
}
@@ -203,7 +203,7 @@
/*
* If this process' state is currently in hardware, swap it out.
*/
-
+
if (ci->ci_fpu_state == 0 ||
ci->ci_fpu_state != tf->tf_cr30) {
return;
@@ -216,7 +216,7 @@
/*
* This emulates a coprocessor load/store instruction.
*/
-static int
+static int
hppa_fpu_ls(struct trapframe *frame, struct lwp *l)
{
struct pcb *pcb = lwp_getpcb(l);
@@ -231,9 +231,9 @@
/*
* Get the instruction that we're emulating,
* and break it down. Using HP bit notation,
- * b is a five-bit field starting at bit 10,
+ * b is a five-bit field starting at bit 10,
* x is a five-bit field starting at bit 15,
- * s is a two-bit field starting at bit 17,
+ * s is a two-bit field starting at bit 17,
* and t is a five-bit field starting at bit 31.
*/
inst = frame->tf_iir;
@@ -260,13 +260,13 @@
/* Get the base register. */
base = FRAME_REG(frame, inst_b, r0);
-
+
/* Dispatch on whether or not this is an indexed load/store. */
if (inst & OPCODE_INDEXED) {
-
+
/* Get the index register value. */
index = *FRAME_REG(frame, inst_x, r0);
-
+
/* Dispatch on the completer. */
switch (inst & OPCODE_CMPLT) {
case OPCODE_CMPLT_S:
@@ -323,7 +323,7 @@
/*
* This is called to emulate an instruction.
*/
-void
+void
hppa_fpu_emulate(struct trapframe *frame, struct lwp *l, u_int inst)
{
struct pcb *pcb = lwp_getpcb(l);
@@ -333,7 +333,7 @@
ksiginfo_t ksi;
/*
- * If the process' state is in any hardware FPU,
+ * If the process' state is in any hardware FPU,
* flush it out - we need to operate on it.
*/
hppa_fpu_flush(l);
@@ -391,10 +391,10 @@
case 0x06:
exception = decode_06(inst, fpregs);
break;
- case 0x26:
+ case 0x26:
exception = decode_26(inst, fpregs);
break;
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