[src/trunk]: src/sys/arch/arm/dts Revert RockPro64 dts changes made for rk339...

[jakllsch <jakllsch%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/6972ea81c7ff
branches:  trunk
changeset: 455723:6972ea81c7ff
user:      jakllsch <jakllsch%NetBSD.org@localhost>
date:      Wed Apr 10 23:30:28 2019 +0000

description:
Revert RockPro64 dts changes made for rk3399_pcie.   This will need to
be re-done differently so as to avoid contention between dts upstream
and our driver.

diffstat:

 sys/arch/arm/dts/rk3399-rockpro64.dts |  48 -----------------------------------
 1 files changed, 0 insertions(+), 48 deletions(-)

diffs (72 lines):

diff -r 8eb2fa2cc88f -r 6972ea81c7ff sys/arch/arm/dts/rk3399-rockpro64.dts
--- a/sys/arch/arm/dts/rk3399-rockpro64.dts     Wed Apr 10 23:14:46 2019 +0000
+++ b/sys/arch/arm/dts/rk3399-rockpro64.dts     Wed Apr 10 23:30:28 2019 +0000
@@ -85,18 +85,6 @@
                regulator-max-microvolt = <12000000>;
        };
 
-       vcc3v3_pcie: vcc3v3-pcie-regulator {
-               compatible = "regulator-fixed";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               enable-active-high;
-               gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
-               pinctrl-names = "default";
-               pinctrl-0 = <&pcie_pwr_en>;
-               regulator-name = "vcc3v3_pcie";
-               vin-supply = <&dc_12v>;
-       };
-
        vcc1v8_s0: vcc1v8-s0 {
                compatible = "regulator-fixed";
                regulator-name = "vcc1v8_s0";
@@ -864,18 +852,6 @@
                                <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
                };
        };
-
-       pcie {
-               pcie_pwr_en: pcie-pwr-en {
-                       rockchip,pins =
-                               <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
-               };
-
-               pcie_clkreqn: pci-clkreqn {
-                       rockchip,pins =
-                               <2 RK_PD2 RK_FUNC_2 &pcfg_pull_none>;
-               };
-       };
 };
 
 &cluster0_opp {
@@ -896,30 +872,6 @@
        };
 };
 
-&pcie_phy {
-       status = "okay";
-};
-
-&pcie0 {
-       assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
-       assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
-       assigned-clock-rates = <100000000>;
-       ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
-       num-lanes = <4>;
-       max-link-speed = <2>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pcie_clkreqn>;
-       vpcie3v3-supply = <&vcc3v3_pcie>;
-       status = "okay";
-       bus-range = <0 3>;
-       ranges = <
-                 0xc3000000 0x0 0xf8000000 0x0 0xf8000000 0x0 0x2000000 /* 32M region 0, prefmem */
-                 0x82000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1c00000 /* 28M regions 1-28, mem */
-                 0x81000000 0x0 0x00000000 0x0 0xfbc00000 0x0 0x0100000 /*  1M region 29, i/o */
-                 0x00010000 0x0 0x00000000 0x0 0xfbd00000 0x0 0x0300000 /*  3M regions 30-32, config */
-                 >;
-};
-
 &spi1 {
        status = "okay";