Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/dev Use unsigned to avoid undefined behavior. Found by k...



details:   https://anonhg.NetBSD.org/src/rev/225d1f759dd1
branches:  trunk
changeset: 455354:225d1f759dd1
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Tue Oct 15 18:20:44 2019 +0000

description:
Use unsigned to avoid undefined behavior. Found by kUBSan.

diffstat:

 sys/dev/ieee1394/firewire.c  |   8 ++++----
 sys/dev/ieee1394/fwohci.c    |  14 +++++++-------
 sys/dev/ieee1394/fwohcireg.h |   8 ++++----
 sys/dev/pci/pccbbreg.h       |   4 ++--
 4 files changed, 17 insertions(+), 17 deletions(-)

diffs (148 lines):

diff -r 5d1b9453e981 -r 225d1f759dd1 sys/dev/ieee1394/firewire.c
--- a/sys/dev/ieee1394/firewire.c       Tue Oct 15 17:25:02 2019 +0000
+++ b/sys/dev/ieee1394/firewire.c       Tue Oct 15 18:20:44 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: firewire.c,v 1.48 2018/09/03 16:29:31 riastradh Exp $  */
+/*     $NetBSD: firewire.c,v 1.49 2019/10/15 18:21:47 msaitoh Exp $    */
 /*-
  * Copyright (c) 2003 Hidetoshi Shimokawa
  * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa
@@ -37,7 +37,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: firewire.c,v 1.48 2018/09/03 16:29:31 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: firewire.c,v 1.49 2019/10/15 18:21:47 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -1407,12 +1407,12 @@
        CSRARC(fc, BANDWIDTH_AV) = 4915;
        CSRARC(fc, CHANNELS_AV_HI) = 0xffffffff;
        CSRARC(fc, CHANNELS_AV_LO) = 0xffffffff;
-       CSRARC(fc, IP_CHANNELS) = (1 << 31);
+       CSRARC(fc, IP_CHANNELS) = (1U << 31);
 
        CSRARC(fc, CONF_ROM) = 0x04 << 24;
        CSRARC(fc, CONF_ROM + 4) = 0x31333934; /* means strings 1394 */
        CSRARC(fc, CONF_ROM + 8) =
-           1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 | 0xff << 16 | 0x09 << 8;
+           1U << 31 | 1 << 30 | 1 << 29 | 1 << 28 | 0xff << 16 | 0x09 << 8;
        CSRARC(fc, CONF_ROM + 0xc) = 0;
 
 /* DV depend CSRs see blue book */
diff -r 5d1b9453e981 -r 225d1f759dd1 sys/dev/ieee1394/fwohci.c
--- a/sys/dev/ieee1394/fwohci.c Tue Oct 15 17:25:02 2019 +0000
+++ b/sys/dev/ieee1394/fwohci.c Tue Oct 15 18:20:44 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fwohci.c,v 1.142 2019/05/28 08:59:34 msaitoh Exp $     */
+/*     $NetBSD: fwohci.c,v 1.143 2019/10/15 18:21:47 msaitoh Exp $     */
 
 /*-
  * Copyright (c) 2003 Hidetoshi Shimokawa
@@ -37,7 +37,7 @@
  *
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fwohci.c,v 1.142 2019/05/28 08:59:34 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fwohci.c,v 1.143 2019/10/15 18:21:47 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/atomic.h>
@@ -224,7 +224,7 @@
 #define        OHCI_ATRETRY            0x008
 #define        OHCI_CROMHDR            0x018
 #define        OHCI_BUS_OPT            0x020
-#define        OHCI_BUSIRMC            (1 << 31)
+#define        OHCI_BUSIRMC            (1U << 31)
 #define        OHCI_BUSCMC             (1 << 30)
 #define        OHCI_BUSISC             (1 << 29)
 #define        OHCI_BUSBMC             (1 << 28)
@@ -250,7 +250,7 @@
 
 #define        OHCI_SID_BUF            0x064
 #define        OHCI_SID_CNT            0x068
-#define OHCI_SID_ERR           (1 << 31)
+#define OHCI_SID_ERR           (1U << 31)
 #define OHCI_SID_CNT_MASK      0xffc
 
 #define        OHCI_IT_STAT            0x090
@@ -752,7 +752,7 @@
        OWRITE(sc, OHCI_CSR_DATA, node);
        OWRITE(sc, OHCI_CSR_COMP, 0x3f);
        OWRITE(sc, OHCI_CSR_CONT, OHCI_BUS_MANAGER_ID);
-       for (i = 0; !(OREAD(sc, OHCI_CSR_CONT) & (1<<31)) && (i < 1000); i++)
+       for (i = 0; !(OREAD(sc, OHCI_CSR_CONT) & (1U <<31)) && (i < 1000); i++)
                DELAY(10);
        bm = OREAD(sc, OHCI_CSR_DATA);
        if ((bm & 0x3f) == 0x3f)
@@ -1296,7 +1296,7 @@
        /* AT Retries */
        OWRITE(sc, FWOHCI_RETRY,
            /* CycleLimit   PhyRespRetries ATRespRetries ATReqRetries */
-           (0xffff << 16) | (0x0f << 8) | (0x0f << 4) | 0x0f);
+           (0xffffU << 16) | (0x0f << 8) | (0x0f << 4) | 0x0f);
 
        sc->atrq.top = STAILQ_FIRST(&sc->atrq.db_trq);
        sc->atrs.top = STAILQ_FIRST(&sc->atrs.db_trq);
@@ -2013,7 +2013,7 @@
                OWRITE(sc, FWOHCI_INTMASK, OHCI_INT_PHY_BUS_R);
 
                /* Allow async. request to us */
-               OWRITE(sc, OHCI_AREQHI, 1 << 31);
+               OWRITE(sc, OHCI_AREQHI, 1U << 31);
                if (firewire_phydma_enable) {
                        /* allow from all nodes */
                        OWRITE(sc, OHCI_PREQHI, 0x7fffffff);
diff -r 5d1b9453e981 -r 225d1f759dd1 sys/dev/ieee1394/fwohcireg.h
--- a/sys/dev/ieee1394/fwohcireg.h      Tue Oct 15 17:25:02 2019 +0000
+++ b/sys/dev/ieee1394/fwohcireg.h      Tue Oct 15 18:20:44 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fwohcireg.h,v 1.19 2018/03/31 14:50:45 sevan Exp $     */
+/*     $NetBSD: fwohcireg.h,v 1.20 2019/10/15 18:21:47 msaitoh Exp $   */
 
 /*-
  * Copyright (c) 2003 Hidetoshi Shimokawa
@@ -285,13 +285,13 @@
        fwohcireg_t     link_cntl_clr;  /* Chip control clear 0xe4*/
 #define FWOHCI_NODEID  0xe8
        fwohcireg_t     node;           /* Node ID 0xe8 */
-#define        OHCI_NODE_VALID (1 << 31)
+#define        OHCI_NODE_VALID (1U << 31)
 #define        OHCI_NODE_ROOT  (1 << 30)
 
 #define        OHCI_ASYSRCBUS  1
 
        fwohcireg_t     phy_access;     /* PHY cntl 0xec */
-#define        PHYDEV_RDDONE           (1<<31)
+#define        PHYDEV_RDDONE           (1U<<31)
 #define        PHYDEV_RDCMD            (1<<15)
 #define        PHYDEV_WRCMD            (1<<14)
 #define        PHYDEV_REGADDR          8
@@ -442,7 +442,7 @@
 #define OHCI_INT_ERR           (0x1 << 24)
 #define OHCI_INT_CYC_LONG      (0x1 << 25)
 #define OHCI_INT_PHY_REG       (0x1 << 26)
-#define OHCI_INT_EN            (0x1 << 31)
+#define OHCI_INT_EN            (0x1U << 31)
 
 #define IP_CHANNELS            0x0234
 #define FWOHCI_MAXREC          2048
diff -r 5d1b9453e981 -r 225d1f759dd1 sys/dev/pci/pccbbreg.h
--- a/sys/dev/pci/pccbbreg.h    Tue Oct 15 17:25:02 2019 +0000
+++ b/sys/dev/pci/pccbbreg.h    Tue Oct 15 18:20:44 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pccbbreg.h,v 1.15 2009/12/15 22:17:12 snj Exp $        */
+/*     $NetBSD: pccbbreg.h,v 1.16 2019/10/15 18:20:44 msaitoh Exp $    */
 
 /*
  * Copyright (c) 1999 HAYAKAWA Koichi.  All rights reserved.
@@ -67,7 +67,7 @@
 
 /* PCI_CB_LSCP_REG */
 #define PCI_CB_LATENCY_SHIFT 24
-#define PCI_CB_LATENCY_MASK  0xff
+#define PCI_CB_LATENCY_MASK  0xffU
 #define PCI_CB_LATENCY(x) (((x) >> PCI_CB_LATENCY_SHIFT) & PCI_CB_LATENCY_MASK)
 
 



Home | Main Index | Thread Index | Old Index