[src/trunk]: src/sys/arch/arm/cortex Allow set_affinity calls before PEs are ...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ee67860b13a4
branches:  trunk
changeset: 451951:ee67860b13a4
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Wed Jun 12 21:02:07 2019 +0000

description:
Allow set_affinity calls before PEs are brought online. We store the
desired target PE if set_affinity is called early and restore the routes
when the PE comes alive.

diffstat:

 sys/arch/arm/cortex/gicv3_its.c |  43 +++++++++++++++++++++++++++++++---------
 sys/arch/arm/cortex/gicv3_its.h |   4 +-
 2 files changed, 35 insertions(+), 12 deletions(-)

diffs (118 lines):

diff -r fcaa2546e02c -r ee67860b13a4 sys/arch/arm/cortex/gicv3_its.c
--- a/sys/arch/arm/cortex/gicv3_its.c   Wed Jun 12 17:45:23 2019 +0000
+++ b/sys/arch/arm/cortex/gicv3_its.c   Wed Jun 12 21:02:07 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3_its.c,v 1.11 2019/06/12 10:00:09 jmcneill Exp $ */
+/* $NetBSD: gicv3_its.c,v 1.12 2019/06/12 21:02:07 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
 #define _INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gicv3_its.c,v 1.11 2019/06/12 10:00:09 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3_its.c,v 1.12 2019/06/12 21:02:07 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/kmem.h>
@@ -260,11 +260,14 @@
 gicv3_its_msi_alloc_lpi(struct gicv3_its *its,
     const struct pci_attach_args *pa)
 {
+       struct pci_attach_args *new_pa;
        int n;
 
        for (n = 0; n < its->its_pic->pic_maxsources; n++) {
                if (its->its_pa[n] == NULL) {
-                       its->its_pa[n] = pa;
+                       new_pa = kmem_alloc(sizeof(*new_pa), KM_SLEEP);
+                       memcpy(new_pa, pa, sizeof(*new_pa));
+                       its->its_pa[n] = new_pa;
                        return n + its->its_pic->pic_irqbase;
                }
        }
@@ -275,8 +278,13 @@
 static void
 gicv3_its_msi_free_lpi(struct gicv3_its *its, int lpi)
 {
+       struct pci_attach_args *pa;
+
        KASSERT(lpi >= its->its_pic->pic_irqbase);
+
+       pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
        its->its_pa[lpi - its->its_pic->pic_irqbase] = NULL;
+       kmem_free(pa, sizeof(*pa));
 }
 
 static uint32_t
@@ -702,7 +710,9 @@
 {
        struct gicv3_its * const its = priv;
        struct gicv3_softc * const sc = its->its_gic;
+       const struct pci_attach_args *pa;
        uint64_t rdbase;
+       size_t irq;
 
        const uint64_t typer = bus_space_read_8(sc->sc_bst, its->its_bsh, GITS_TYPER);
        if (typer & GITS_TYPER_PTA) {
@@ -720,6 +730,20 @@
        gits_command_invall(its, cpu_index(ci));
        gits_wait(its);
 
+       /*
+        * Update routing for LPIs targetting this CPU
+        */
+       for (irq = 0; irq < its->its_pic->pic_maxsources; irq++) {
+               if (its->its_targets[irq] != ci)
+                       continue;
+               pa = its->its_pa[irq];
+               KASSERT(pa != NULL);
+
+               const uint32_t devid = gicv3_its_devid(pa->pa_pc, pa->pa_tag);
+               gits_command_movi(its, devid, devid, cpu_index(ci));
+               gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
+       }
+
        its->its_cpuonline[cpu_index(ci)] = true;
 }
 
@@ -751,14 +775,13 @@
                return EINVAL;
 
        ci = cpu_lookup(kcpuset_ffs(affinity) - 1);
-       if (its->its_cpuonline[cpu_index(ci)] == false)
-               return ENXIO;
+       its->its_targets[irq] = ci;
 
-       const uint32_t devid = gicv3_its_devid(pa->pa_pc, pa->pa_tag);
-       gits_command_movi(its, devid, devid, cpu_index(ci));
-       gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
-
-       its->its_targets[irq] = ci;
+       if (its->its_cpuonline[cpu_index(ci)] == true) {
+               const uint32_t devid = gicv3_its_devid(pa->pa_pc, pa->pa_tag);
+               gits_command_movi(its, devid, devid, cpu_index(ci));
+               gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
+       }
 
        return 0;
 }
diff -r fcaa2546e02c -r ee67860b13a4 sys/arch/arm/cortex/gicv3_its.h
--- a/sys/arch/arm/cortex/gicv3_its.h   Wed Jun 12 17:45:23 2019 +0000
+++ b/sys/arch/arm/cortex/gicv3_its.h   Wed Jun 12 21:02:07 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3_its.h,v 1.5 2019/06/12 10:00:09 jmcneill Exp $ */
+/* $NetBSD: gicv3_its.h,v 1.6 2019/06/12 21:02:07 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -59,7 +59,7 @@
        struct gicv3_lpi_callback its_cb;
 
        struct pic_softc        *its_pic;
-       const struct pci_attach_args **its_pa;
+       struct pci_attach_args  **its_pa;
        struct cpu_info         **its_targets;
 
        LIST_HEAD(, gicv3_its_device) its_devices;