[src/trunk]: src/sys/arch Initial commit of FDTised Xilinx Zynq-7000 support....

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/5f5d859e05f0
branches:  trunk
changeset: 451904:5f5d859e05f0
user:      skrll <skrll%NetBSD.org@localhost>
date:      Tue Jun 11 13:01:48 2019 +0000

description:
Initial commit of FDTised Xilinx Zynq-7000 support.  Tested with

qemu-system-arm -M xilinx-zynq-a9 -dtb zynq-zed.dtb -kernel netbsd.ub \
    -serial /dev/null -serial stdio

Based on a set of diffs/files from rjs@

sys/arch/arm/zynq is kept in place to allow existing kernels (e.g.
ZEDBOARD and PARALLELLA) to continue to build/work during the transition,
but eventually sys/arch/arm/zynq will be deleted.

diffstat:

 sys/arch/arm/xilinx/files.zynq      |    39 +
 sys/arch/arm/xilinx/zynq7000_sdhc.c |   134 ++
 sys/arch/arm/xilinx/zynq7000_uart.c |   121 +
 sys/arch/arm/xilinx/zynq7000_usb.c  |   105 +
 sys/arch/arm/xilinx/zynq_cemac.c    |    96 +
 sys/arch/arm/xilinx/zynq_platform.c |   201 +++
 sys/arch/arm/xilinx/zynq_uart.c     |  2168 +++++++++++++++++++++++++++++++++++
 sys/arch/arm/xilinx/zynq_uartreg.h  |   110 +
 sys/arch/arm/xilinx/zynq_uartvar.h  |    53 +
 sys/arch/arm/xilinx/zynq_usb.c      |   371 +++++
 sys/arch/arm/xilinx/zynq_usbreg.h   |   112 +
 sys/arch/arm/xilinx/zynq_usbvar.h   |    61 +
 sys/arch/evbarm/conf/GENERIC        |    23 +-
 sys/arch/evbarm/conf/files.generic  |     3 +-
 14 files changed, 3595 insertions(+), 2 deletions(-)

diffs (truncated from 3706 to 300 lines):

diff -r 7d2ef51b3a4a -r 5f5d859e05f0 sys/arch/arm/xilinx/files.zynq
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/xilinx/files.zynq    Tue Jun 11 13:01:48 2019 +0000
@@ -0,0 +1,39 @@
+#      $NetBSD: files.zynq,v 1.1 2019/06/11 13:01:48 skrll Exp $
+#
+# Configuration info for Xilinx Zynq-7000 SoC
+#
+#
+
+file   arch/arm/xilinx/zynq_platform.c         soc_zynq
+
+# SOC parameters
+defflag        opt_soc.h                               SOC_ZYNQ
+defflag        opt_soc.h                               SOC_ZYNQ7000: SOC_ZYNQ
+
+# System Level Control Module
+#device        zynqslcr
+#attach        zynqslcr at fdt
+#file  arch/arm/xilinx/zynq_slcr.c             zynqslcr needs-flag
+
+# UART
+device zynquart
+attach zynquart at fdt
+file   arch/arm/xilinx/zynq_uart.c             zynquart needs-flag
+file   arch/arm/xilinx/zynq7000_uart.c         zynquart
+defflag        opt_zynquart.h                          ZYNQUARTCONSOLE
+
+# Gigabit Ethernet Controller
+device cemac: ether, ifnet, arp, mii, bus_dma_generic
+attach cemac at fdt
+file   dev/cadence/if_cemac.c                  cemac
+file   arch/arm/xilinx/zynq_cemac.c            cemac
+
+# USB controller
+attach ehci at fdt with zynqusb
+file   arch/arm/xilinx/zynq_usb.c              zynqusb
+file   arch/arm/xilinx/zynq7000_usb.c          zynqusb
+
+# SD host controller for SD/MMC
+attach sdhc at fdt with sdhc_fdt
+file   arch/arm/xilinx/zynq7000_sdhc.c         sdhc_fdt
+
diff -r 7d2ef51b3a4a -r 5f5d859e05f0 sys/arch/arm/xilinx/zynq7000_sdhc.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/xilinx/zynq7000_sdhc.c       Tue Jun 11 13:01:48 2019 +0000
@@ -0,0 +1,134 @@
+/*     $NetBSD: zynq7000_sdhc.c,v 1.1 2019/06/11 13:01:48 skrll Exp $  */
+
+/*-
+ * Copyright (c) 2015  Genetec Corporation.  All rights reserved.
+ * Written by Hashimoto Kenichi for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: zynq7000_sdhc.c,v 1.1 2019/06/11 13:01:48 skrll Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/pmf.h>
+#include <sys/systm.h>
+
+#include <machine/intr.h>
+
+#include <dev/sdmmc/sdhcvar.h>
+#include <dev/sdmmc/sdmmcvar.h>
+
+#include <dev/fdt/fdtvar.h>
+
+/* Clock */
+#define        ZYNQ7000_PS_CLK         (33333333) /* 33.333 MHz */
+
+struct sdhc_fdt_softc {
+       struct sdhc_softc  sc_sdhc;
+       /* we have only one slot */
+       struct sdhc_host *sc_hosts[1];
+
+       void *sc_ih;
+};
+
+static int sdhc_match(device_t, cfdata_t, void *);
+static void sdhc_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(sdhc_fdt, sizeof(struct sdhc_fdt_softc),
+    sdhc_match, sdhc_attach, NULL, NULL);
+
+
+static const char * compatible[] = {
+       "arasan,sdhci-8.9a",
+       NULL
+};
+
+static int
+sdhc_match(device_t parent, cfdata_t cf, void *aux)
+{
+
+       struct fdt_attach_args * const faa = aux;
+
+       return of_match_compatible(faa->faa_phandle, compatible);
+}
+
+static void
+sdhc_attach(device_t parent, device_t self, void *aux)
+{
+       struct sdhc_fdt_softc *sc = device_private(self);
+       struct fdt_attach_args * faa = aux;
+       const int phandle = faa->faa_phandle;
+       char intrstr[128];
+       bus_addr_t addr;
+       bus_size_t size;
+       bus_space_handle_t ioh;
+
+       if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
+               aprint_error(": couldn't get registers\n");
+               return;
+       }
+
+       if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
+               aprint_error(": failed to decode interrupt\n");
+               return;
+       }
+
+       sc->sc_sdhc.sc_dev = self;
+
+       sc->sc_sdhc.sc_dmat = faa->faa_dmat;
+
+       if (bus_space_map(faa->faa_bst, addr, size, 0, &ioh)) {
+               aprint_error_dev(self, "can't map\n");
+               return;
+       }
+
+       aprint_normal(": SD/MMC host controller\n");
+       aprint_naive("\n");
+
+       sc->sc_sdhc.sc_host = sc->sc_hosts;
+       /* base clock frequency in kHz */
+       sc->sc_sdhc.sc_clkbase = ZYNQ7000_PS_CLK / 1000;
+       sc->sc_sdhc.sc_flags |= SDHC_FLAG_32BIT_ACCESS;
+
+       sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_SDMMC, IST_LEVEL,
+           sdhc_intr, &sc->sc_sdhc);
+       if (sc->sc_ih == NULL) {
+               aprint_error_dev(self, "failed to establish interrupt on %s\n",
+                   intrstr);
+               return;
+       }
+       aprint_normal_dev(self, "interrupting on %s\n", intrstr);
+
+       if (sdhc_host_found(&sc->sc_sdhc, faa->faa_bst, ioh, size)) {
+               aprint_error_dev(self, "can't initialize host\n");
+               return;
+       }
+
+       if (!pmf_device_register1(self, sdhc_suspend, sdhc_resume,
+               sdhc_shutdown)) {
+               aprint_error_dev(self,
+                   "can't establish power hook\n");
+       }
+}
diff -r 7d2ef51b3a4a -r 5f5d859e05f0 sys/arch/arm/xilinx/zynq7000_uart.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/xilinx/zynq7000_uart.c       Tue Jun 11 13:01:48 2019 +0000
@@ -0,0 +1,121 @@
+/*     $NetBSD: zynq7000_uart.c,v 1.1 2019/06/11 13:01:48 skrll Exp $  */
+
+/*-
+ * Copyright (c) 2015  Genetec Corporation.  All rights reserved.
+ * Written by Hashimoto Kenichi for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: zynq7000_uart.c,v 1.1 2019/06/11 13:01:48 skrll Exp $");
+
+#include "opt_soc.h"
+#include "opt_console.h"
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+
+#include <arm/xilinx/zynq_uartreg.h>
+#include <arm/xilinx/zynq_uartvar.h>
+
+#include <dev/fdt/fdtvar.h>
+
+static const char * compatible[] = {
+       "xlnx,xuartps",
+       "cdns,uart-r1p8",
+       NULL
+};
+
+int
+zynquart_match(device_t parent, struct cfdata *cf, void *aux)
+{
+       struct fdt_attach_args * const faa = aux;
+
+       return of_match_compatible(faa->faa_phandle, compatible);
+}
+
+void
+zynquart_attach(device_t parent, device_t self, void *aux)
+{
+       struct fdt_attach_args * faa = aux;
+       const int phandle = faa->faa_phandle;
+       char intrstr[128];
+       bus_addr_t addr;
+       bus_size_t size;
+
+       if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
+               aprint_error(": couldn't get registers\n");
+               return;
+       }
+
+       if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
+               aprint_error(": failed to decode interrupt\n");
+               return;
+       }
+
+       if (fdtbus_intr_establish(phandle, 0, IPL_SERIAL, IST_LEVEL,
+               zynquartintr, device_private(self)) == NULL) {
+               aprint_error_dev(self, "failed to establish interrupt on %s\n", intrstr);
+               return;
+       }
+       aprint_normal_dev(self, "interrupting on %s\n", intrstr);
+
+       zynquart_attach_common(parent, self, faa->faa_bst, addr, size, 0);
+}
+
+/*
+ * Console support
+ */
+
+static int
+zynq_uart_console_match(int phandle)
+{
+       return of_match_compatible(phandle, compatible);
+}
+
+static void
+zynq_uart_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
+{
+       const int phandle = faa->faa_phandle;
+       bus_space_tag_t bst = faa->faa_bst;
+       bus_addr_t addr;
+       tcflag_t flags;
+       int speed;
+
+       fdtbus_get_reg(phandle, 0, &addr, NULL);
+       speed = fdtbus_get_stdout_speed();
+       if (speed < 0)
+               speed = 115200; /* default */
+       flags = fdtbus_get_stdout_flags();
+
+       if (zynquart_cons_attach(bst, addr, speed, flags))
+               panic("Cannot initialize zynq uart console");
+}
+