[src/trunk]: src/sys/arch/arm/nvidia Add Tegra124 "mselect" clock and two PCI...

[jakllsch <jakllsch%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c4d75436b91f
branches:  trunk
changeset: 449528:c4d75436b91f
user:      jakllsch <jakllsch%NetBSD.org@localhost>
date:      Sat Mar 09 19:41:26 2019 +0000

description:
Add Tegra124 "mselect" clock and two PCIe-related clocks it sources.

With mainline u-boot (not starting the pci subsystem in the firmware):
Gets to a root prompt instead of hanging during tegrapcie attach, but
PCIe remains non-functional without a modern "xusbpad" phy driver for
Tegra124 (needed to configure the lane map).

diffstat:

 sys/arch/arm/nvidia/tegra124_car.c    |  15 +++++++++++++--
 sys/arch/arm/nvidia/tegra124_carreg.h |   6 +++++-
 2 files changed, 18 insertions(+), 3 deletions(-)

diffs (84 lines):

diff -r 9aaab6a0c47c -r c4d75436b91f sys/arch/arm/nvidia/tegra124_car.c
--- a/sys/arch/arm/nvidia/tegra124_car.c        Sat Mar 09 18:53:52 2019 +0000
+++ b/sys/arch/arm/nvidia/tegra124_car.c        Sat Mar 09 19:41:26 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra124_car.c,v 1.16 2018/09/26 22:32:46 jmcneill Exp $ */
+/* $NetBSD: tegra124_car.c,v 1.17 2019/03/09 19:41:26 jakllsch Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra124_car.c,v 1.16 2018/09/26 22:32:46 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra124_car.c,v 1.17 2019/03/09 19:41:26 jakllsch Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -403,6 +403,9 @@
 static const char *mux_hda_p[] =
        { "pll_p_out0", "pll_c2_out0", "pll_c_out0", "pll_c3_out0",
          "pll_m_out0", NULL, "clk_m" };
+static const char *mux_mselect_p[] =
+       { "pll_p_out0", "pll_c2_out0", "pll_c_out0", "pll_c3_out0",
+         "pll_m_out0", "clk_s", "clk_m" };
 static const char *mux_tsensor_p[] =
        { "pll_p_out0", "pll_c2_out0", "pll_c_out0", "pll_c3_out0", "clk_m",
          NULL, "clk_s" };
@@ -497,6 +500,9 @@
        CLK_MUX("mux_soc_therm",
                CAR_CLKSRC_SOC_THERM_REG, CAR_CLKSRC_SOC_THERM_SRC,
                mux_soc_therm_p),
+       CLK_MUX("mux_mselect",
+               CAR_CLKSRC_MSELECT_REG, CAR_CLKSRC_MSELECT_SRC,
+               mux_mselect_p),
        CLK_MUX("mux_tsensor",
                CAR_CLKSRC_TSENSOR_REG, CAR_CLKSRC_TSENSOR_SRC,
                mux_tsensor_p),
@@ -575,6 +581,8 @@
                CAR_CLKSRC_HDA_REG, CAR_CLKSRC_HDA_DIV),
        CLK_DIV("div_soc_therm", "mux_soc_therm",
                CAR_CLKSRC_SOC_THERM_REG, CAR_CLKSRC_SOC_THERM_DIV),
+       CLK_DIV("div_mselect", "mux_mselect",
+               CAR_CLKSRC_MSELECT_REG, CAR_CLKSRC_MSELECT_DIV),
        CLK_DIV("div_tsensor", "mux_tsensor",
                CAR_CLKSRC_TSENSOR_REG, CAR_CLKSRC_TSENSOR_DIV),
        CLK_DIV("div_host1x", "mux_host1x",
@@ -626,6 +634,7 @@
        CLK_GATE_W("hda2hdmi", "clk_m", CAR_DEV_W_HDA2HDMICODEC),
        CLK_GATE_H("fuse", "clk_m", CAR_DEV_H_FUSE),
        CLK_GATE_U("soc_therm", "div_soc_therm", CAR_DEV_U_SOC_THERM),
+       CLK_GATE_V("mselect", "div_mselect", CAR_DEV_V_MSELECT),
        CLK_GATE_V("tsensor", "div_tsensor", CAR_DEV_V_TSENSOR),
        CLK_GATE_L("host1x", "div_host1x", CAR_DEV_L_HOST1X),
        CLK_GATE_L("disp1", "mux_disp1", CAR_DEV_L_DISP1),
@@ -637,6 +646,8 @@
        CLK_GATE_W("xusb_ss", "xusb_ss_src", CAR_DEV_W_XUSB_SS),
        CLK_GATE_X("gpu", "pll_ref", CAR_DEV_X_GPU),
        CLK_GATE_H("apbdma", "clk_m", CAR_DEV_H_APBDMA),
+       CLK_GATE_U("pcie", "mselect", CAR_DEV_U_PCIE),
+       CLK_GATE_U("afi", "mselect", CAR_DEV_U_AFI),
 };
 
 struct tegra124_init_parent {
diff -r 9aaab6a0c47c -r c4d75436b91f sys/arch/arm/nvidia/tegra124_carreg.h
--- a/sys/arch/arm/nvidia/tegra124_carreg.h     Sat Mar 09 18:53:52 2019 +0000
+++ b/sys/arch/arm/nvidia/tegra124_carreg.h     Sat Mar 09 19:41:26 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra124_carreg.h,v 1.6 2017/07/21 01:01:22 jmcneill Exp $ */
+/* $NetBSD: tegra124_carreg.h,v 1.7 2019/03/09 19:41:26 jakllsch Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -427,6 +427,10 @@
 #define CAR_CCLKG_BURST_POLICY_CWAKEUP_SOURCE_CLKM             0
 #define CAR_CCLKG_BURST_POLICY_CWAKEUP_SOURCE_PLLX_OUT0_LJ     8
 
+#define CAR_CLKSRC_MSELECT_REG         0x3b4
+#define CAR_CLKSRC_MSELECT_SRC         __BITS(31,29)
+#define CAR_CLKSRC_MSELECT_DIV         __BITS(7,0)
+
 #define CAR_CLKSRC_TSENSOR_REG         0x3b8
 #define CAR_CLKSRC_TSENSOR_SRC         __BITS(31,29)
 #define CAR_CLKSRC_TSENSOR_SRC_CLK_M   4