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[src/trunk]: src/sys/dev/pci No functional change:



details:   https://anonhg.NetBSD.org/src/rev/dbb226c3a5c7
branches:  trunk
changeset: 449263:dbb226c3a5c7
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Fri Mar 01 05:41:56 2019 +0000

description:
No functional change:
 - u_int* -> uint*
 - KNF.

diffstat:

 sys/dev/pci/pccbb.c   |  180 +++++++++++++++++++++----------------------------
 sys/dev/pci/pci_map.c |   14 +-
 sys/dev/pci/pciconf.c |   60 ++++++++--------
 3 files changed, 116 insertions(+), 138 deletions(-)

diffs (truncated from 837 to 300 lines):

diff -r 08bf75d90812 -r dbb226c3a5c7 sys/dev/pci/pccbb.c
--- a/sys/dev/pci/pccbb.c       Fri Mar 01 05:39:01 2019 +0000
+++ b/sys/dev/pci/pccbb.c       Fri Mar 01 05:41:56 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pccbb.c,v 1.212 2018/09/03 16:29:32 riastradh Exp $    */
+/*     $NetBSD: pccbb.c,v 1.213 2019/03/01 05:41:56 msaitoh Exp $      */
 
 /*
  * Copyright (c) 1998, 1999 and 2000
@@ -26,7 +26,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pccbb.c,v 1.212 2018/09/03 16:29:32 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pccbb.c,v 1.213 2019/03/01 05:41:56 msaitoh Exp $");
 
 /*
 #define CBB_DEBUG
@@ -54,7 +54,6 @@
 #include <dev/pci/pccbbreg.h>
 
 #include <dev/cardbus/cardslotvar.h>
-
 #include <dev/cardbus/cardbusvar.h>
 
 #include <dev/pcmcia/pcmciareg.h>
@@ -102,8 +101,8 @@
 
 static int pccbb_detect_card(struct pccbb_softc *);
 
-static void pccbb_pcmcia_write(struct pccbb_softc *, int, u_int8_t);
-static u_int8_t pccbb_pcmcia_read(struct pccbb_softc *, int);
+static void pccbb_pcmcia_write(struct pccbb_softc *, int, uint8_t);
+static uint8_t pccbb_pcmcia_read(struct pccbb_softc *, int);
 #define Pcic_read(sc, reg) pccbb_pcmcia_read((sc), (reg))
 #define Pcic_write(sc, reg, val) pccbb_pcmcia_write((sc), (reg), (val))
 
@@ -111,26 +110,25 @@
 STATIC int cb_detect_voltage(struct pccbb_softc *);
 STATIC int cbbprint(void *, const char *);
 
-static int cb_chipset(u_int32_t, int *);
+static int cb_chipset(uint32_t, int *);
 STATIC void pccbb_pcmcia_attach_setup(struct pccbb_softc *,
     struct pcmciabus_attach_args *);
 
 STATIC int pccbb_ctrl(cardbus_chipset_tag_t, int);
-STATIC int pccbb_power(struct pccbb_softc *sc, int);
+STATIC int pccbb_power(struct pccbb_softc *, int);
 STATIC int pccbb_power_ct(cardbus_chipset_tag_t, int);
-STATIC int pccbb_cardenable(struct pccbb_softc * sc, int function);
+STATIC int pccbb_cardenable(struct pccbb_softc *, int);
 static void *pccbb_intr_establish(struct pccbb_softc *,
-    int level, int (*ih) (void *), void *sc);
-static void pccbb_intr_disestablish(struct pccbb_softc *, void *ih);
+    int, int (*ih) (void *), void *);
+static void pccbb_intr_disestablish(struct pccbb_softc *, void *);
 
 static void *pccbb_cb_intr_establish(cardbus_chipset_tag_t,
-    int level, int (*ih) (void *), void *sc);
-static void pccbb_cb_intr_disestablish(cardbus_chipset_tag_t ct, void *ih);
+    int, int (*ih) (void *), void *);
+static void pccbb_cb_intr_disestablish(cardbus_chipset_tag_t, void *);
 
 static pcitag_t pccbb_make_tag(cardbus_chipset_tag_t, int, int);
 static pcireg_t pccbb_conf_read(cardbus_chipset_tag_t, pcitag_t, int);
-static void pccbb_conf_write(cardbus_chipset_tag_t, pcitag_t, int,
-    pcireg_t);
+static void pccbb_conf_write(cardbus_chipset_tag_t, pcitag_t, int, pcireg_t);
 static void pccbb_chipinit(struct pccbb_softc *);
 static void pccbb_intrinit(struct pccbb_softc *);
 
@@ -154,7 +152,7 @@
 STATIC void pccbb_pcmcia_socket_enable(pcmcia_chipset_handle_t);
 STATIC void pccbb_pcmcia_socket_disable(pcmcia_chipset_handle_t);
 STATIC void pccbb_pcmcia_socket_settype(pcmcia_chipset_handle_t, int);
-STATIC int pccbb_pcmcia_card_detect(pcmcia_chipset_handle_t pch);
+STATIC int pccbb_pcmcia_card_detect(pcmcia_chipset_handle_t);
 
 static int pccbb_pcmcia_wait_ready(struct pccbb_softc *);
 static void pccbb_pcmcia_delay(struct pccbb_softc *, int, const char *);
@@ -165,23 +163,22 @@
 /* bus-space allocation and deallocation functions */
 
 static int pccbb_rbus_cb_space_alloc(cardbus_chipset_tag_t, rbus_tag_t,
-    bus_addr_t addr, bus_size_t size, bus_addr_t mask, bus_size_t align,
-    int flags, bus_addr_t * addrp, bus_space_handle_t * bshp);
+    bus_addr_t, bus_size_t, bus_addr_t, bus_size_t,
+    int, bus_addr_t *, bus_space_handle_t *);
 static int pccbb_rbus_cb_space_free(cardbus_chipset_tag_t, rbus_tag_t,
     bus_space_handle_t, bus_size_t);
 
 
 
 static int pccbb_open_win(struct pccbb_softc *, bus_space_tag_t,
-    bus_addr_t, bus_size_t, bus_space_handle_t, int flags);
+    bus_addr_t, bus_size_t, bus_space_handle_t, int);
 static int pccbb_close_win(struct pccbb_softc *, bus_space_tag_t,
     bus_space_handle_t, bus_size_t);
 static int pccbb_winlist_insert(struct pccbb_win_chain_head *, bus_addr_t,
     bus_size_t, bus_space_handle_t, int);
 static int pccbb_winlist_delete(struct pccbb_win_chain_head *,
     bus_space_handle_t, bus_size_t);
-static void pccbb_winset(bus_addr_t align, struct pccbb_softc *,
-    bus_space_tag_t);
+static void pccbb_winset(bus_addr_t, struct pccbb_softc *, bus_space_tag_t);
 void pccbb_winlist_show(struct pccbb_win_chain *);
 
 
@@ -192,8 +189,8 @@
 static bool pccbb_resume(device_t, const pmf_qual_t *);
 
 #if defined SHOW_REGS
-static void cb_show_regs(pci_chipset_tag_t pc, pcitag_t tag,
-    bus_space_tag_t memt, bus_space_handle_t memh);
+static void cb_show_regs(pci_chipset_tag_t, pcitag_t,
+    bus_space_tag_t, bus_space_handle_t);
 #endif
 
 CFATTACH_DECL3_NEW(cbb_pci, sizeof(struct pccbb_softc),
@@ -344,7 +341,7 @@
 };
 
 static int
-cb_chipset(u_int32_t pci_id, int *flagp)
+cb_chipset(uint32_t pci_id, int *flagp)
 {
        const struct yenta_chipinfo *yc;
 
@@ -357,7 +354,7 @@
        if (flagp != NULL)
                *flagp = yc->yc_flags;
 
-       return (yc->yc_chiptype);
+       return yc->yc_chiptype;
 }
 
 void
@@ -434,9 +431,9 @@
                         * I think it's funny: socket base registers must be
                         * mapped on memory space, but ...
                         */
-                       if (pci_mapreg_map(pa, PCI_SOCKBASE, PCI_MAPREG_TYPE_IO,
-                           0, &sc->sc_base_memt, &sc->sc_base_memh, &sockbase,
-                           &sc->sc_base_size)) {
+                       if (pci_mapreg_map(pa, PCI_SOCKBASE,
+                           PCI_MAPREG_TYPE_IO, 0, &sc->sc_base_memt,
+                           &sc->sc_base_memh, &sockbase, &sc->sc_base_size)) {
                                aprint_error_dev(self,
                                    "can't map socket base address"
                                    " 0x%lx: io mode\n",
@@ -447,8 +444,7 @@
                                sc->sc_flags |= CBB_MEMHMAPPED;
                } else {
                        DPRINTF(("%s: socket base address 0x%lx\n",
-                           device_xname(self),
-                           (unsigned long)sockbase));
+                           device_xname(self), (unsigned long)sockbase));
                        sc->sc_flags |= CBB_MEMHMAPPED;
                }
        }
@@ -547,8 +543,7 @@
        case CBB_MEMHMAPPED|CBB_SPECMAPPED:
 #if rbus
        {
-               rbus_space_free(sc->sc_rbus_memt, bmh, 0x1000,
-                   NULL);
+               rbus_space_free(sc->sc_rbus_memt, bmh, 0x1000, NULL);
        }
 #else
                bus_space_free(bmt, bmh, 0x1000);
@@ -634,13 +629,12 @@
        sc->sc_pil_intr_enable = true;
 
        {
-               u_int32_t sockstat;
+               uint32_t sockstat;
 
                sockstat = bus_space_read_4(sc->sc_base_memt,
                    sc->sc_base_memh, CB_SOCKET_STAT);
-               if (0 == (sockstat & CB_SOCKET_STAT_CD)) {
+               if (0 == (sockstat & CB_SOCKET_STAT_CD))
                        sc->sc_flags |= CBB_CARDEXIST;
-               }
        }
 
        /*
@@ -666,10 +660,8 @@
                cba.cba_cacheline = PCI_CACHELINE(bhlc);
                cba.cba_max_lattimer = PCI_LATTIMER(bhlc);
 
-               aprint_verbose_dev(self,
-                   "cacheline 0x%x lattimer 0x%x\n",
-                   cba.cba_cacheline,
-                   cba.cba_max_lattimer);
+               aprint_verbose_dev(self, "cacheline 0x%x lattimer 0x%x\n",
+                   cba.cba_cacheline, cba.cba_max_lattimer);
                aprint_verbose_dev(self, "bhlc 0x%x\n", bhlc);
 #if defined SHOW_REGS
                cb_show_regs(sc->sc_pc, sc->sc_tag, sc->sc_base_memt,
@@ -1002,7 +994,7 @@
 {
        struct pccbb_softc *sc = (struct pccbb_softc *)arg;
        struct cardslot_softc *csc;
-       u_int32_t sockevent, sockstate;
+       uint32_t sockevent, sockstate;
        bus_space_tag_t memt = sc->sc_base_memt;
        bus_space_handle_t memh = sc->sc_base_memh;
 
@@ -1092,7 +1084,7 @@
                }
        }
 
-       return (1);
+       return 1;
 }
 
 /*
@@ -1125,7 +1117,7 @@
 {
        struct pccbb_softc *sc = arg;
        struct cardslot_softc *csc;
-       u_int32_t sockevent, sockstate;
+       uint32_t sockevent, sockstate;
 
        if (!(sc->sc_flags & CBB_INSERTING)) {
                /* We add a card only under inserting state. */
@@ -1159,13 +1151,12 @@
                } else {
                        /* who are you? */
                }
-       } else {
+       } else
                callout_schedule(&sc->sc_insert_ch, mstohz(100));
-       }
 }
 
 #define PCCBB_PCMCIA_OFFSET 0x800
-static u_int8_t
+static uint8_t
 pccbb_pcmcia_read(struct pccbb_softc *sc, int reg)
 {
        bus_space_barrier(sc->sc_base_memt, sc->sc_base_memh,
@@ -1176,7 +1167,7 @@
 }
 
 static void
-pccbb_pcmcia_write(struct pccbb_softc *sc, int reg, u_int8_t val)
+pccbb_pcmcia_write(struct pccbb_softc *sc, int reg, uint8_t val)
 {
        bus_space_write_1(sc->sc_base_memt, sc->sc_base_memh,
                          PCCBB_PCMCIA_OFFSET + reg, val);
@@ -1245,7 +1236,7 @@
 STATIC int
 pccbb_power(struct pccbb_softc *sc, int command)
 {
-       u_int32_t status, osock_ctrl, sock_ctrl, reg_ctrl;
+       uint32_t status, osock_ctrl, sock_ctrl, reg_ctrl;
        bus_space_tag_t memt = sc->sc_base_memt;
        bus_space_handle_t memh = sc->sc_base_memh;
        int on = 0, pwrcycle, times;
@@ -1413,7 +1404,7 @@
 {
        bus_space_handle_t base_memh = sc->sc_base_memh;
        bus_space_tag_t base_memt = sc->sc_base_memt;
-       u_int32_t sockstat =
+       uint32_t sockstat =
            bus_space_read_4(base_memt, base_memh, CB_SOCKET_STAT);
        int retval = 0;
 
@@ -1447,7 +1438,7 @@
         */
        int reset_duration =
            (sc->sc_chipset == CB_RX5C47X ? 400 : 50);
-       u_int32_t bcr = pci_conf_read(sc->sc_pc, sc->sc_tag,
+       uint32_t bcr = pci_conf_read(sc->sc_pc, sc->sc_tag,
            PCI_BRIDGE_CONTROL_REG);
        aprint_debug("%s: enter bcr %" PRIx32 "\n", __func__, bcr);
 
@@ -1477,19 +1468,18 @@
 STATIC int
 cb_detect_voltage(struct pccbb_softc *sc)
 {
-       u_int32_t psr;                 /* socket present-state reg */
+       uint32_t psr;                  /* socket present-state reg */
        bus_space_tag_t iot = sc->sc_base_memt;
        bus_space_handle_t ioh = sc->sc_base_memh;
        int vol = PCCARD_VCC_UKN;      /* set 0 */
 
        psr = bus_space_read_4(iot, ioh, CB_SOCKET_STAT);
 
-       if (0x400u & psr) {
+       if (0x400u & psr)
                vol |= PCCARD_VCC_5V;
-       }
-       if (0x800u & psr) {
+
+       if (0x800u & psr)
                vol |= PCCARD_VCC_3V;
-       }



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