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[src/trunk]: src/sys/dev/pci Nowadays some UEFI BIOSes don't enable some PCI ...
details: https://anonhg.NetBSD.org/src/rev/6a2235749510
branches: trunk
changeset: 447765:6a2235749510
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Wed Jan 23 06:56:19 2019 +0000
description:
Nowadays some UEFI BIOSes don't enable some PCI devices' address decoding.
To resolve this problem, pci_map.c rev. 1.34-1.36 changed the
pci_mapreg_(sub)map()'s to set the decode bit if it's not set. It's good for
almost all drivers, but some other drivers don't use pci_mapreg_map().
In drivers which don't use pci_mapreg_map(), some of them expilicitly enable
decoding but others don't. Add code to enable decoding to them.
See also the following discussion:
http://mail-index.netbsd.org/tech-kern/2017/03/22/msg021678.html
diffstat:
sys/dev/pci/if_fxp_pci.c | 14 ++++++++++++--
sys/dev/pci/ixgbe/ixgbe.c | 13 +++++++++++--
sys/dev/pci/ixgbe/ixv.c | 13 +++++++++++--
sys/dev/pci/nvme_pci.c | 22 ++++++++++++++--------
sys/dev/pci/xhci_pci.c | 17 +++++++++++------
5 files changed, 59 insertions(+), 20 deletions(-)
diffs (199 lines):
diff -r 33fb53dc9894 -r 6a2235749510 sys/dev/pci/if_fxp_pci.c
--- a/sys/dev/pci/if_fxp_pci.c Wed Jan 23 05:50:34 2019 +0000
+++ b/sys/dev/pci/if_fxp_pci.c Wed Jan 23 06:56:19 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_fxp_pci.c,v 1.84 2019/01/23 05:50:34 msaitoh Exp $ */
+/* $NetBSD: if_fxp_pci.c,v 1.85 2019/01/23 06:56:19 msaitoh Exp $ */
/*-
* Copyright (c) 1997, 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_fxp_pci.c,v 1.84 2019/01/23 05:50:34 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_fxp_pci.c,v 1.85 2019/01/23 06:56:19 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -302,6 +302,7 @@
bus_space_handle_t ioh, memh;
int ioh_valid, memh_valid;
bus_addr_t addr;
+ pcireg_t csr;
int flags;
int error;
char intrbuf[PCI_INTRSTR_LEN];
@@ -350,6 +351,15 @@
if (memh_valid) {
sc->sc_st = memt;
sc->sc_sh = memh;
+ /*
+ * Enable address decoding for memory range in case BIOS or
+ * UEFI didn't set it.
+ */
+ csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
+ PCI_COMMAND_STATUS_REG);
+ csr |= PCI_COMMAND_MEM_ENABLE;
+ pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
+ csr);
} else if (ioh_valid) {
sc->sc_st = iot;
sc->sc_sh = ioh;
diff -r 33fb53dc9894 -r 6a2235749510 sys/dev/pci/ixgbe/ixgbe.c
--- a/sys/dev/pci/ixgbe/ixgbe.c Wed Jan 23 05:50:34 2019 +0000
+++ b/sys/dev/pci/ixgbe/ixgbe.c Wed Jan 23 06:56:19 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.c,v 1.170 2018/12/08 14:57:11 msaitoh Exp $ */
+/* $NetBSD: ixgbe.c,v 1.171 2019/01/23 06:56:19 msaitoh Exp $ */
/******************************************************************************
@@ -3420,7 +3420,7 @@
ixgbe_allocate_pci_resources(struct adapter *adapter,
const struct pci_attach_args *pa)
{
- pcireg_t memtype;
+ pcireg_t memtype, csr;
device_t dev = adapter->dev;
bus_addr_t addr;
int flags;
@@ -3445,6 +3445,15 @@
aprint_error_dev(dev, "unable to map BAR0\n");
return ENXIO;
}
+ /*
+ * Enable address decoding for memory range in case BIOS or
+ * UEFI don't set it.
+ */
+ csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
+ PCI_COMMAND_STATUS_REG);
+ csr |= PCI_COMMAND_MEM_ENABLE;
+ pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
+ csr);
break;
default:
aprint_error_dev(dev, "unexpected type on BAR0\n");
diff -r 33fb53dc9894 -r 6a2235749510 sys/dev/pci/ixgbe/ixv.c
--- a/sys/dev/pci/ixgbe/ixv.c Wed Jan 23 05:50:34 2019 +0000
+++ b/sys/dev/pci/ixgbe/ixv.c Wed Jan 23 06:56:19 2019 +0000
@@ -1,4 +1,4 @@
-/*$NetBSD: ixv.c,v 1.107 2018/09/27 05:40:27 msaitoh Exp $*/
+/*$NetBSD: ixv.c,v 1.108 2019/01/23 06:56:19 msaitoh Exp $*/
/******************************************************************************
@@ -1398,7 +1398,7 @@
ixv_allocate_pci_resources(struct adapter *adapter,
const struct pci_attach_args *pa)
{
- pcireg_t memtype;
+ pcireg_t memtype, csr;
device_t dev = adapter->dev;
bus_addr_t addr;
int flags;
@@ -1423,6 +1423,15 @@
aprint_error_dev(dev, "unable to map BAR0\n");
return ENXIO;
}
+ /*
+ * Enable address decoding for memory range in case it's not
+ * set.
+ */
+ csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
+ PCI_COMMAND_STATUS_REG);
+ csr |= PCI_COMMAND_MEM_ENABLE;
+ pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
+ csr);
break;
default:
aprint_error_dev(dev, "unexpected type on BAR0\n");
diff -r 33fb53dc9894 -r 6a2235749510 sys/dev/pci/nvme_pci.c
--- a/sys/dev/pci/nvme_pci.c Wed Jan 23 05:50:34 2019 +0000
+++ b/sys/dev/pci/nvme_pci.c Wed Jan 23 06:56:19 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: nvme_pci.c,v 1.25 2018/12/07 08:52:43 msaitoh Exp $ */
+/* $NetBSD: nvme_pci.c,v 1.26 2019/01/23 06:56:19 msaitoh Exp $ */
/* $OpenBSD: nvme_pci.c,v 1.3 2016/04/14 11:18:32 dlg Exp $ */
/*
@@ -43,7 +43,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nvme_pci.c,v 1.25 2018/12/07 08:52:43 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvme_pci.c,v 1.26 2019/01/23 06:56:19 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -160,18 +160,24 @@
pci_aprint_devinfo(pa, NULL);
- reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
- if ((reg & PCI_COMMAND_MASTER_ENABLE) == 0) {
- reg |= PCI_COMMAND_MASTER_ENABLE;
- pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
- }
-
/* Map registers */
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, NVME_PCI_BAR);
if (PCI_MAPREG_TYPE(memtype) != PCI_MAPREG_TYPE_MEM) {
aprint_error_dev(self, "invalid type (type=0x%x)\n", memtype);
return;
}
+ reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
+ if (((reg & PCI_COMMAND_MASTER_ENABLE) == 0) ||
+ ((reg & PCI_COMMAND_MEM_ENABLE) == 0)) {
+ /*
+ * Enable address decoding for memory range in case BIOS or
+ * UEFI didn't set it.
+ */
+ reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
+ pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
+ reg);
+ }
+
sc->sc_iot = pa->pa_memt;
error = pci_mapreg_info(pa->pa_pc, pa->pa_tag, NVME_PCI_BAR,
memtype, &memaddr, &sc->sc_ios, &flags);
diff -r 33fb53dc9894 -r 6a2235749510 sys/dev/pci/xhci_pci.c
--- a/sys/dev/pci/xhci_pci.c Wed Jan 23 05:50:34 2019 +0000
+++ b/sys/dev/pci/xhci_pci.c Wed Jan 23 06:56:19 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: xhci_pci.c,v 1.20 2019/01/18 07:03:02 skrll Exp $ */
+/* $NetBSD: xhci_pci.c,v 1.21 2019/01/23 06:56:19 msaitoh Exp $ */
/* OpenBSD: xhci_pci.c,v 1.4 2014/07/12 17:38:51 yuo Exp */
/*
@@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: xhci_pci.c,v 1.20 2019/01/18 07:03:02 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: xhci_pci.c,v 1.21 2019/01/23 06:56:19 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_xhci_pci.h"
@@ -138,12 +138,17 @@
/* Check for quirks */
sc->sc_quirks = 0;
- /* check if memory space access is enabled */
csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) {
- sc->sc_ios = 0;
- aprint_error_dev(self, "memory access is disabled\n");
- return;
+ /*
+ * Enable address decoding for memory range in case BIOS or
+ * UEFI didn't set it.
+ */
+ csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
+ PCI_COMMAND_STATUS_REG);
+ csr |= PCI_COMMAND_MEM_ENABLE;
+ pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
+ csr);
}
/* map MMIO registers */
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