[src/trunk]: src/sys/arch/x86/x86 In the end, disable the supposed architectu...

[maxv <maxv%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/248b8ce2237d
branches:  trunk
changeset: 446844:248b8ce2237d
user:      maxv <maxv%NetBSD.org@localhost>
date:      Sat Dec 22 10:00:39 2018 +0000

description:
In the end, disable the supposed architectural SpectreV2 mitigation on
AMD f12h and f16h. The SDMs of these CPUs haven't been updated since, and
we shouldn't assume the position of the bits, we just can't know where
they are.

Initially I included f12h and f16h because f10h is actually documented
to have a bit to disable the indirect branch predictor, and there were
patches available in SuSE and CentOS that were treating f10h/f12h/f16h
all the same. Knowing that SuSE has ties with AMD, it seemed safe to
assume that these patches were correct and that f12h and f16h could
indeed be treated the same way as f10h.

But these patches have now disappeared, and the main Linux branch
doesn't have them, without clear explanation. Therefore, I prefer to
roll-back.

diffstat:

 sys/arch/x86/x86/spectre.c |  6 ++----
 1 files changed, 2 insertions(+), 4 deletions(-)

diffs (27 lines):

diff -r e6bf3e0546ce -r 248b8ce2237d sys/arch/x86/x86/spectre.c
--- a/sys/arch/x86/x86/spectre.c        Sat Dec 22 09:20:30 2018 +0000
+++ b/sys/arch/x86/x86/spectre.c        Sat Dec 22 10:00:39 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: spectre.c,v 1.21 2018/12/22 09:20:30 maxv Exp $        */
+/*     $NetBSD: spectre.c,v 1.22 2018/12/22 10:00:39 maxv Exp $        */
 
 /*
  * Copyright (c) 2018 NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: spectre.c,v 1.21 2018/12/22 09:20:30 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: spectre.c,v 1.22 2018/12/22 10:00:39 maxv Exp $");
 
 #include "opt_spectre.h"
 
@@ -142,8 +142,6 @@
                 */
                switch (CPUID_TO_FAMILY(ci->ci_signature)) {
                case 0x10:
-               case 0x12:
-               case 0x16:
                        v2_mitigation_method = V2_MITIGATION_AMD_DIS_IND;
                        break;
                default: