[src/trunk]: src/sys/arch/x86/x86 Merge the VIA detection code into cpu_probe...

[maxv <maxv%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/d096ccd0c148
branches:  trunk
changeset: 445716:d096ccd0c148
user:      maxv <maxv%NetBSD.org@localhost>
date:      Sat Nov 10 11:08:54 2018 +0000

description:
Merge the VIA detection code into cpu_probe_c3.

diffstat:

 sys/arch/x86/x86/identcpu.c |  52 +++++++++++++++++++++-----------------------
 1 files changed, 25 insertions(+), 27 deletions(-)

diffs (83 lines):

diff -r 7ee8cdab917c -r d096ccd0c148 sys/arch/x86/x86/identcpu.c
--- a/sys/arch/x86/x86/identcpu.c       Sat Nov 10 10:57:06 2018 +0000
+++ b/sys/arch/x86/x86/identcpu.c       Sat Nov 10 11:08:54 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: identcpu.c,v 1.81 2018/11/10 10:52:52 maxv Exp $       */
+/*     $NetBSD: identcpu.c,v 1.82 2018/11/10 11:08:54 maxv Exp $       */
 
 /*-
  * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.81 2018/11/10 10:52:52 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.82 2018/11/10 11:08:54 maxv Exp $");
 
 #include "opt_xen.h"
 
@@ -482,32 +482,13 @@
 cpu_probe_winchip(struct cpu_info *ci)
 {
 
-       if (cpu_vendor != CPUVENDOR_IDT)
+       if (cpu_vendor != CPUVENDOR_IDT ||
+           CPUID_TO_FAMILY(ci->ci_signature) != 5)
                return;
 
-       switch (CPUID_TO_FAMILY(ci->ci_signature)) {
-       case 5:
-               /* WinChip C6 */
-               if (CPUID_TO_MODEL(ci->ci_signature) == 4)
-                       ci->ci_feat_val[0] &= ~CPUID_TSC;
-               break;
-       case 6:
-               /*
-                * VIA Eden ESP 
-                *
-                * Quoting from page 3-4 of: "VIA Eden ESP Processor Datasheet"
-                * http://www.via.com.tw/download/mainboards/6/14/Eden20v115.pdf
-                * 
-                * 1. The CMPXCHG8B instruction is provided and always enabled,
-                *    however, it appears disabled in the corresponding CPUID
-                *    function bit 0 to avoid a bug in an early version of
-                *    Windows NT. However, this default can be changed via a
-                *    bit in the FCR MSR.
-                */
-               ci->ci_feat_val[0] |= CPUID_CX8;
-               wrmsr(MSR_VIA_FCR, rdmsr(MSR_VIA_FCR) | VIA_ACE_ECX8);
-               break;
-       }
+       /* WinChip C6 */
+       if (CPUID_TO_MODEL(ci->ci_signature) == 4)
+               ci->ci_feat_val[0] &= ~CPUID_TSC;
 }
 
 static void
@@ -528,8 +509,25 @@
        x86_cpuid(0x80000000, descs);
        lfunc = descs[0];
 
+       if (family == 6) {
+               /*
+                * VIA Eden ESP.
+                *
+                * Quoting from page 3-4 of: "VIA Eden ESP Processor Datasheet"
+                * http://www.via.com.tw/download/mainboards/6/14/Eden20v115.pdf
+                * 
+                * 1. The CMPXCHG8B instruction is provided and always enabled,
+                *    however, it appears disabled in the corresponding CPUID
+                *    function bit 0 to avoid a bug in an early version of
+                *    Windows NT. However, this default can be changed via a
+                *    bit in the FCR MSR.
+                */
+               ci->ci_feat_val[0] |= CPUID_CX8;
+               wrmsr(MSR_VIA_FCR, rdmsr(MSR_VIA_FCR) | VIA_ACE_ECX8);
+       }
+
        if (family > 6 || model > 0x9 || (model == 0x9 && stepping >= 3)) {
-               /* Nehemiah or Esther */
+               /* VIA Nehemiah or Esther. */
                x86_cpuid(0xc0000000, descs);
                lfunc = descs[0];
                if (lfunc >= 0xc0000001) {      /* has ACE, RNG */