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[src/trunk]: src/sys/arch Provide generic start code that assumes the MMU is ...
details: https://anonhg.NetBSD.org/src/rev/e7e2e174652b
branches: trunk
changeset: 445219:e7e2e174652b
user: skrll <skrll%NetBSD.org@localhost>
date: Thu Oct 18 09:01:51 2018 +0000
description:
Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.
The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.
The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.
Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!
The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.
Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively
diffstat:
sys/arch/aarch64/aarch64/locore.S | 17 +-
sys/arch/aarch64/aarch64/pmap.c | 6 +-
sys/arch/aarch64/aarch64/start.S | 6 +-
sys/arch/aarch64/conf/files.aarch64 | 3 +-
sys/arch/aarch64/include/cpu.h | 4 +-
sys/arch/aarch64/include/machdep.h | 3 +-
sys/arch/aarch64/include/pmap.h | 4 +-
sys/arch/arm/acpi/cpu_acpi.c | 8 +-
sys/arch/arm/altera/cycv_platform.c | 41 +-
sys/arch/arm/altera/cycv_reg.h | 4 +-
sys/arch/arm/arm/armv6_start.S | 1076 +++++++++++++++++++++++++
sys/arch/arm/arm/cpufunc.c | 134 ++-
sys/arch/arm/arm32/arm32_boot.c | 80 +-
sys/arch/arm/arm32/arm32_kvminit.c | 109 ++-
sys/arch/arm/arm32/arm32_machdep.c | 103 +-
sys/arch/arm/arm32/cpu.c | 12 +-
sys/arch/arm/arm32/genassym.cf | 15 +-
sys/arch/arm/arm32/locore.S | 17 +-
sys/arch/arm/arm32/pmap.c | 58 +-
sys/arch/arm/broadcom/bcm283x_platform.c | 41 +-
sys/arch/arm/broadcom/files.bcm2835 | 10 +-
sys/arch/arm/conf/files.arm | 6 +-
sys/arch/arm/fdt/arm_fdtvar.h | 4 +-
sys/arch/arm/fdt/cpu_fdt.c | 84 +-
sys/arch/arm/imx/imx6_board.c | 12 +-
sys/arch/arm/imx/imx6_srcreg.h | 7 +-
sys/arch/arm/imx/imx6var.h | 5 +-
sys/arch/arm/include/arm32/machdep.h | 3 +-
sys/arch/arm/include/arm32/pmap.h | 7 +-
sys/arch/arm/include/cpu.h | 8 +-
sys/arch/arm/include/param.h | 4 +-
sys/arch/arm/include/types.h | 5 +-
sys/arch/arm/nvidia/soc_tegra124.c | 11 +-
sys/arch/arm/nvidia/tegra_platform.c | 33 +-
sys/arch/arm/nvidia/tegra_var.h | 6 +-
sys/arch/arm/rockchip/rk_platform.c | 5 +-
sys/arch/arm/samsung/exynos_combiner.c | 6 +-
sys/arch/arm/samsung/exynos_platform.c | 40 +-
sys/arch/arm/samsung/exynos_soc.c | 8 +-
sys/arch/arm/samsung/files.exynos | 14 +-
sys/arch/arm/sunxi/sunxi_platform.c | 28 +-
sys/arch/arm/vexpress/vexpress_platform.c | 18 +-
sys/arch/arm/virt/virt_platform.c | 5 +-
sys/arch/arm/zynq/zynq7000_board.c | 11 +-
sys/arch/arm/zynq/zynq7000_reg.h | 10 +-
sys/arch/arm/zynq/zynq7000_var.h | 3 +-
sys/arch/evbarm/altera/altera_start.S | 126 --
sys/arch/evbarm/altera/genassym.cf | 7 -
sys/arch/evbarm/altera/platform.h | 6 +-
sys/arch/evbarm/amlogic/amlogic_machdep.c | 171 ++-
sys/arch/evbarm/amlogic/amlogic_start.S | 216 -----
sys/arch/evbarm/amlogic/genassym.cf | 37 -
sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c | 49 +-
sys/arch/evbarm/beagle/beagle_machdep.c | 45 +-
sys/arch/evbarm/conf/EXYNOS | 6 +-
sys/arch/evbarm/conf/GENERIC | 13 +-
sys/arch/evbarm/conf/HUMMINGBOARD | 5 +-
sys/arch/evbarm/conf/IMX6UL-STARTER | 5 +-
sys/arch/evbarm/conf/NANOSOC | 4 +-
sys/arch/evbarm/conf/ODROID-C1 | 17 +-
sys/arch/evbarm/conf/PARALLELLA | 4 +-
sys/arch/evbarm/conf/RPI | 4 +-
sys/arch/evbarm/conf/RPI2 | 6 +-
sys/arch/evbarm/conf/VEXPRESS_A15 | 4 +-
sys/arch/evbarm/conf/VIRT | 4 +-
sys/arch/evbarm/conf/files.exynos | 15 +-
sys/arch/evbarm/conf/files.generic | 19 +-
sys/arch/evbarm/conf/files.generic64 | 6 +-
sys/arch/evbarm/conf/files.rpi | 10 +-
sys/arch/evbarm/conf/files.sunxi | 6 +-
sys/arch/evbarm/conf/files.tegra | 6 +-
sys/arch/evbarm/conf/mk.altera | 8 +-
sys/arch/evbarm/conf/mk.amlogic | 13 +-
sys/arch/evbarm/conf/mk.bcm53xx | 10 +-
sys/arch/evbarm/conf/mk.exynos | 9 +-
sys/arch/evbarm/conf/mk.generic | 13 +-
sys/arch/evbarm/conf/mk.imx6ul | 10 +-
sys/arch/evbarm/conf/mk.nitrogen6 | 10 +-
sys/arch/evbarm/conf/mk.rpi | 8 +-
sys/arch/evbarm/conf/mk.sunxi | 8 +-
sys/arch/evbarm/conf/mk.tegra | 8 +-
sys/arch/evbarm/conf/mk.vexpress | 6 +-
sys/arch/evbarm/conf/mk.virt | 6 +-
sys/arch/evbarm/conf/mk.zynq | 10 +-
sys/arch/evbarm/conf/std.altera | 24 +-
sys/arch/evbarm/conf/std.amlogic | 5 +-
sys/arch/evbarm/conf/std.bcm53xx | 31 +-
sys/arch/evbarm/conf/std.exynos | 3 +-
sys/arch/evbarm/conf/std.generic | 13 +-
sys/arch/evbarm/conf/std.imx6ul | 5 +-
sys/arch/evbarm/conf/std.nitrogen6 | 9 +-
sys/arch/evbarm/conf/std.rpi | 3 +-
sys/arch/evbarm/conf/std.sunxi | 3 +-
sys/arch/evbarm/conf/std.tegra | 5 +-
sys/arch/evbarm/conf/std.vexpress | 3 +-
sys/arch/evbarm/conf/std.virt | 3 +-
sys/arch/evbarm/conf/std.zynq | 6 +-
sys/arch/evbarm/exynos/exynos_start.S | 283 ------
sys/arch/evbarm/exynos/genassym.cf | 34 -
sys/arch/evbarm/fdt/fdt_machdep.c | 76 +-
sys/arch/evbarm/nitrogen6/genassym.cf | 63 -
sys/arch/evbarm/nitrogen6/nitrogen6_machdep.c | 176 +++-
sys/arch/evbarm/nitrogen6/nitrogen6_start.S | 359 --------
sys/arch/evbarm/rpi/genassym.cf | 43 -
sys/arch/evbarm/rpi/rpi2_start.S | 237 -----
sys/arch/evbarm/rpi/rpi_start.S | 411 ---------
sys/arch/evbarm/sunxi/genassym.cf | 44 -
sys/arch/evbarm/sunxi/sunxi_start.S | 201 ----
sys/arch/evbarm/tegra/genassym.cf | 38 -
sys/arch/evbarm/tegra/tegra_start.S | 198 ----
sys/arch/evbarm/vexpress/vexpress_start.S | 191 ----
sys/arch/evbarm/virt/virt_start.S | 181 ----
sys/arch/evbarm/zynq/genassym.cf | 47 -
sys/arch/evbarm/zynq/platform.h | 5 +-
sys/arch/evbarm/zynq/zynq_machdep.c | 178 +++-
sys/arch/evbarm/zynq/zynq_start.S | 322 -------
116 files changed, 2523 insertions(+), 3681 deletions(-)
diffs (truncated from 9212 to 300 lines):
diff -r f14b8b3453b3 -r e7e2e174652b sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Thu Oct 18 07:53:13 2018 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Thu Oct 18 09:01:51 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.29 2018/10/12 01:28:57 ryo Exp $ */
+/* $NetBSD: locore.S,v 1.30 2018/10/18 09:01:51 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,7 +38,7 @@
#include <aarch64/hypervisor.h>
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.29 2018/10/12 01:28:57 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.30 2018/10/18 09:01:51 skrll Exp $")
/*#define DEBUG_LOCORE /* debug print */
@@ -342,7 +342,6 @@
#endif /* DEBUG_LOCORE */
-ENTRY_NP(aarch64_mpstart)
ENTRY_NP(cpu_mpstart)
mrs x3, mpidr_el1
ldr x0, =(MPIDR_AFF0|MPIDR_AFF1|MPIDR_AFF2|MPIDR_AFF3)
@@ -481,7 +480,7 @@
bl _C_LABEL(cpu_hatch)
mov x0, xzr
b _C_LABEL(idle_loop) /* never to return */
-END(aarch64_mpstart)
+END(cpu_mpstart)
toomanycpus:
CPU_DPRINT("too many cpus, or MPIDR not exists in cpu_mpidr[]\n")
@@ -491,11 +490,10 @@
#else /* MULTIPROCESSOR */
-ENTRY_NP(aarch64_mpstart)
-ENTRY_NP(cortex_mpstart) /* compat arm */
+ENTRY_NP(cpu_mpstart)
1: wfi
b 1b
-END(aarch64_mpstart)
+END(cpu_mpstart)
#endif /* MULTIPROCESSOR */
@@ -1040,3 +1038,8 @@
.global ARM_BOOTSTRAP_LxPT
ARM_BOOTSTRAP_LxPT:
l0pt_kern:
+
+ .section "_init_memory", "aw", %nobits
+ .align PGSHIFT
+
+ /* None currently */
diff -r f14b8b3453b3 -r e7e2e174652b sys/arch/aarch64/aarch64/pmap.c
--- a/sys/arch/aarch64/aarch64/pmap.c Thu Oct 18 07:53:13 2018 +0000
+++ b/sys/arch/aarch64/aarch64/pmap.c Thu Oct 18 09:01:51 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.30 2018/10/14 14:31:05 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.31 2018/10/18 09:01:51 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.30 2018/10/14 14:31:05 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.31 2018/10/18 09:01:51 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -293,7 +293,7 @@
}
void
-pmap_devmap_bootstrap(const struct pmap_devmap *table)
+pmap_devmap_bootstrap(vaddr_t l0pt, const struct pmap_devmap *table)
{
vaddr_t va;
int i;
diff -r f14b8b3453b3 -r e7e2e174652b sys/arch/aarch64/aarch64/start.S
--- a/sys/arch/aarch64/aarch64/start.S Thu Oct 18 07:53:13 2018 +0000
+++ b/sys/arch/aarch64/aarch64/start.S Thu Oct 18 09:01:51 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: start.S,v 1.1 2018/09/14 09:06:12 skrll Exp $ */
+/* $NetBSD: start.S,v 1.2 2018/10/18 09:01:51 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -26,13 +26,13 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-#include "opt_arm_debug.h" /* VERBOSE_INIT_ARM */
+#include "opt_arm_debug.h" /* VERBOSE_INIT_ARM and EARLYCONS */
#include <sys/cdefs.h>
#include <aarch64/asm.h>
-RCSID("$NetBSD: start.S,v 1.1 2018/09/14 09:06:12 skrll Exp $")
+RCSID("$NetBSD: start.S,v 1.2 2018/10/18 09:01:51 skrll Exp $")
/* load far effective address (pc relative) */
.macro ADDR, reg, addr
diff -r f14b8b3453b3 -r e7e2e174652b sys/arch/aarch64/conf/files.aarch64
--- a/sys/arch/aarch64/conf/files.aarch64 Thu Oct 18 07:53:13 2018 +0000
+++ b/sys/arch/aarch64/conf/files.aarch64 Thu Oct 18 09:01:51 2018 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.aarch64,v 1.7 2018/10/12 01:28:57 ryo Exp $
+# $NetBSD: files.aarch64,v 1.8 2018/10/18 09:01:51 skrll Exp $
defflag opt_cpuoptions.h AARCH64_ALIGNMENT_CHECK
defflag opt_cpuoptions.h AARCH64_EL0_STACK_ALIGNMENT_CHECK
@@ -17,6 +17,7 @@
# ARM-specific debug options (for compat arch/arm/*)
defflag opt_arm_debug.h ARM_LOCK_CAS_DEBUG
defflag opt_arm_debug.h VERBOSE_INIT_ARM
+defparam opt_arm_debug.h EARLYCONS
# Timer options
defflag opt_arm_timer.h __HAVE_GENERIC_CPU_INITCLOCKS
diff -r f14b8b3453b3 -r e7e2e174652b sys/arch/aarch64/include/cpu.h
--- a/sys/arch/aarch64/include/cpu.h Thu Oct 18 07:53:13 2018 +0000
+++ b/sys/arch/aarch64/include/cpu.h Thu Oct 18 09:01:51 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.9 2018/10/12 21:41:34 jmcneill Exp $ */
+/* $NetBSD: cpu.h,v 1.10 2018/10/18 09:01:51 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -106,10 +106,12 @@
#define setsoftast(ci) atomic_or_uint(&(ci)->ci_astpending, __BIT(0))
#define cpu_signotify(l) setsoftast((l)->l_cpu)
+
void cpu_set_curpri(int);
void cpu_proc_fork(struct proc *, struct proc *);
void cpu_need_proftick(struct lwp *l);
void cpu_boot_secondary_processors(void);
+void cpu_mpstart(void);
void cpu_hatch(struct cpu_info *);
extern struct cpu_info *cpu_info[];
diff -r f14b8b3453b3 -r e7e2e174652b sys/arch/aarch64/include/machdep.h
--- a/sys/arch/aarch64/include/machdep.h Thu Oct 18 07:53:13 2018 +0000
+++ b/sys/arch/aarch64/include/machdep.h Thu Oct 18 09:01:51 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.h,v 1.5 2018/09/15 19:47:48 jakllsch Exp $ */
+/* $NetBSD: machdep.h,v 1.6 2018/10/18 09:01:51 skrll Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -72,6 +72,7 @@
vaddr_t initarm_common(vaddr_t, vsize_t, const struct boot_physmem *, size_t);
void cpu_kernel_vm_init(paddr_t, psize_t);
+void uartputc(int);
void parse_mi_bootargs(char *);
void dumpsys(void);
diff -r f14b8b3453b3 -r e7e2e174652b sys/arch/aarch64/include/pmap.h
--- a/sys/arch/aarch64/include/pmap.h Thu Oct 18 07:53:13 2018 +0000
+++ b/sys/arch/aarch64/include/pmap.h Thu Oct 18 09:01:51 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.15 2018/10/13 08:32:36 ryo Exp $ */
+/* $NetBSD: pmap.h,v 1.16 2018/10/18 09:01:51 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -163,7 +163,7 @@
};
void pmap_devmap_register(const struct pmap_devmap *);
-void pmap_devmap_bootstrap(const struct pmap_devmap *);
+void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *);
const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t);
const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t);
vaddr_t pmap_devmap_phystov(paddr_t);
diff -r f14b8b3453b3 -r e7e2e174652b sys/arch/arm/acpi/cpu_acpi.c
--- a/sys/arch/arm/acpi/cpu_acpi.c Thu Oct 18 07:53:13 2018 +0000
+++ b/sys/arch/arm/acpi/cpu_acpi.c Thu Oct 18 09:01:51 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_acpi.c,v 1.2 2018/10/16 16:18:15 jmcneill Exp $ */
+/* $NetBSD: cpu_acpi.c,v 1.3 2018/10/18 09:01:52 skrll Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.2 2018/10/16 16:18:15 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.3 2018/10/18 09:01:52 skrll Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -55,8 +55,8 @@
static register_t
cpu_acpi_mpstart_pa(void)
{
- extern void aarch64_mpstart(void);
- return (register_t)aarch64_kern_vtophys((vaddr_t)aarch64_mpstart);
+
+ return (register_t)KERN_VTOPHYS((vaddr_t)cpu_mpstart);
}
static int
diff -r f14b8b3453b3 -r e7e2e174652b sys/arch/arm/altera/cycv_platform.c
--- a/sys/arch/arm/altera/cycv_platform.c Thu Oct 18 07:53:13 2018 +0000
+++ b/sys/arch/arm/altera/cycv_platform.c Thu Oct 18 09:01:51 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cycv_platform.c,v 1.2 2018/10/14 18:58:44 aymeric Exp $ */
+/* $NetBSD: cycv_platform.c,v 1.3 2018/10/18 09:01:52 skrll Exp $ */
/* This file is in the public domain. */
@@ -6,7 +6,7 @@
#include "opt_multiprocessor.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cycv_platform.c,v 1.2 2018/10/14 18:58:44 aymeric Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cycv_platform.c,v 1.3 2018/10/18 09:01:52 skrll Exp $");
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/param.h>
@@ -16,6 +16,8 @@
#include <uvm/uvm_extern.h>
+#include <arm/arm32/machdep.h>
+
#include <arm/altera/cycv_reg.h>
#include <arm/altera/cycv_var.h>
#include <arm/cortex/a9tmr_var.h>
@@ -42,17 +44,26 @@
return devmap;
}
-extern void cortex_mpstart(void);
+static void
+cycv_platform_bootstrap(void)
+{
+ bus_space_tag_t bst = &armv7_generic_bs_tag;
+ bus_space_handle_t bsh_l2c;
+
+ bus_space_map(bst, CYCV_L2CACHE_BASE, CYCV_L2CACHE_SIZE, 0, &bsh_l2c);
+
+#if NARML2CC > 0
+ arml2cc_init(bst, bsh_l2c, 0);
+#endif
+}
static void
-cycv_platform_bootstrap(void) {
- uint32_t startfunc = (uint32_t) cortex_mpstart;
+cycv_mpstart(void)
+{
bus_space_tag_t bst = &armv7_generic_bs_tag;
- bus_space_handle_t bsh_l2c;
bus_space_handle_t bsh_rst;
bus_space_handle_t bsh_scu;
- bus_space_map(bst, CYCV_L2CACHE_BASE, CYCV_L2CACHE_SIZE, 0, &bsh_l2c);
bus_space_map(bst, CYCV_RSTMGR_BASE, CYCV_RSTMGR_SIZE, 0, &bsh_rst);
bus_space_map(bst, CYCV_SCU_BASE, CYCV_SCU_SIZE, 0, &bsh_scu);
@@ -60,9 +71,7 @@
bus_space_write_4(bst, bsh_rst, SCU_CTL,
bus_space_read_4(bst, bsh_rst, SCU_CTL) | SCU_CTL_SCU_ENA);
-#if NARML2CC > 0
- arml2cc_init(bst, bsh_l2c, 0);
-#endif
+ const uint32_t startfunc = (uint32_t) KERN_VTOPHYS((vaddr_t)cpu_mpstart);
/*
* We place a "B cortex_mpstart" at address 0 in order to bootstrap
@@ -70,15 +79,16 @@
* it was unmapped by u-boot in favor of the SDRAM. Plus the dtb is
* stored very low in RAM so we can't re-map the Boot ROM easily.
*/
+ extern vaddr_t cpu_ttb;
- *(volatile uint32_t *) 0x0 = htole32(0xea000000 | ((startfunc - 8 - 0x0) >> 2));
+ pmap_map_chunk(cpu_ttb, CYCV_SDRAM_VBASE, CYCV_SDRAM_BASE, L1_S_SIZE,
+ VM_PROT_READ|VM_PROT_WRITE, PMAP_NOCACHE);
+ *(volatile uint32_t *) CYCV_SDRAM_VBASE =
+ htole32(0xea000000 | ((startfunc - 8 - 0x0) >> 2));
+ pmap_unmap_chunk(cpu_ttb, CYCV_SDRAM_BASE, L1_S_SIZE);
arm_cpu_max = 2;
- arm_dsb();
-
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