Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/netbsd-8]: src/sys/arch Pullup the following revisions, requested by max...



details:   https://anonhg.NetBSD.org/src/rev/dc92034706d5
branches:  netbsd-8
changeset: 435042:dc92034706d5
user:      martin <martin%NetBSD.org@localhost>
date:      Sat Jun 09 15:12:21 2018 +0000

description:
Pullup the following revisions, requested by maxv in ticket #865:

        sys/arch/amd64/amd64/machdep.c          1.303 (patch)
        sys/arch/amd64/conf/GENERIC             1.492 (patch)
        sys/arch/amd64/conf/files.amd64         1.103 (patch)
        sys/arch/i386/i386/machdep.c            1.806 (patch)
        sys/arch/i386/conf/GENERIC              1.1179 (patch)
        sys/arch/i386/conf/files.i386           1.393 (patch)
        sys/arch/x86/include/cpu.h              1.91 (patch)
        sys/arch/x86/include/specialreg.h       upto 1.126 (patch)
        sys/arch/x86/x86/x86_machdep.c          upto 1.115 (patch, adapted)
        sys/arch/x86/x86/spectre.c              upto 1.19 (patch, adapted,
                                                no IBRS,
                                                SpectreV2 mitigations not
                                                enabled by default)

Backport the hardware SpectreV2 and SpectreV4 mitigations.

diffstat:

 sys/arch/amd64/amd64/machdep.c    |    7 +-
 sys/arch/amd64/conf/GENERIC       |    5 +-
 sys/arch/amd64/conf/files.amd64   |    3 +-
 sys/arch/i386/conf/GENERIC        |    5 +-
 sys/arch/i386/conf/files.i386     |    3 +-
 sys/arch/i386/i386/machdep.c      |    7 +-
 sys/arch/x86/include/cpu.h        |    3 +-
 sys/arch/x86/include/specialreg.h |   17 +-
 sys/arch/x86/x86/spectre.c        |  546 ++++++++++++++++++++++++++++++++++++++
 sys/arch/x86/x86/x86_machdep.c    |    9 +-
 10 files changed, 586 insertions(+), 19 deletions(-)

diffs (truncated from 802 to 300 lines):

diff -r 1646983e6841 -r dc92034706d5 sys/arch/amd64/amd64/machdep.c
--- a/sys/arch/amd64/amd64/machdep.c    Sat Jun 09 14:59:43 2018 +0000
+++ b/sys/arch/amd64/amd64/machdep.c    Sat Jun 09 15:12:21 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.c,v 1.255.6.6 2018/03/22 16:59:03 martin Exp $ */
+/*     $NetBSD: machdep.c,v 1.255.6.7 2018/06/09 15:12:21 martin Exp $ */
 
 /*-
  * Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007, 2008, 2011
@@ -111,7 +111,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.255.6.6 2018/03/22 16:59:03 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.255.6.7 2018/06/09 15:12:21 martin Exp $");
 
 /* #define XENDEBUG_LOW  */
 
@@ -1549,6 +1549,9 @@
        svs_init();
 #endif
        cpu_init_msrs(&cpu_info_primary, true);
+#ifndef XEN
+       cpu_speculation_init(&cpu_info_primary);
+#endif
 
        use_pae = 1; /* PAE always enabled in long mode */
 
diff -r 1646983e6841 -r dc92034706d5 sys/arch/amd64/conf/GENERIC
--- a/sys/arch/amd64/conf/GENERIC       Sat Jun 09 14:59:43 2018 +0000
+++ b/sys/arch/amd64/conf/GENERIC       Sat Jun 09 15:12:21 2018 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: GENERIC,v 1.459.2.9 2018/04/18 14:45:08 martin Exp $
+# $NetBSD: GENERIC,v 1.459.2.10 2018/06/09 15:12:21 martin Exp $
 #
 # GENERIC machine description file
 #
@@ -22,7 +22,7 @@
 
 options        INCLUDE_CONFIG_FILE     # embed config file in kernel binary
 
-#ident         "GENERIC-$Revision: 1.459.2.9 $"
+#ident         "GENERIC-$Revision: 1.459.2.10 $"
 
 maxusers       64              # estimated number of users
 
@@ -77,6 +77,7 @@
 options        SVS             # Separate Virtual Space
 makeoptions    SPECTRE_V2_GCC_MITIGATION=1     # GCC Spectre variant 2
                                                # migitation
+options        SPECTRE_V2_GCC_MITIGATION
 
 # CPU features
 acpicpu*       at cpu?         # ACPI CPU (including frequency scaling)
diff -r 1646983e6841 -r dc92034706d5 sys/arch/amd64/conf/files.amd64
--- a/sys/arch/amd64/conf/files.amd64   Sat Jun 09 14:59:43 2018 +0000
+++ b/sys/arch/amd64/conf/files.amd64   Sat Jun 09 15:12:21 2018 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.amd64,v 1.88.8.3 2018/04/11 14:23:30 martin Exp $
+#      $NetBSD: files.amd64,v 1.88.8.4 2018/06/09 15:12:21 martin Exp $
 #
 # new style config file for amd64 architecture
 #
@@ -54,6 +54,7 @@
 file   arch/amd64/amd64/process_machdep.c      machdep
 file   arch/amd64/amd64/trap.c                 machdep
 file   arch/x86/x86/fpu.c                      machdep
+file   arch/x86/x86/spectre.c                  machdep
 file   arch/x86/x86/dbregs.c                   machdep
 file   arch/x86/x86/convert_xmm_s87.c          machdep
 file   arch/amd64/amd64/lock_stubs.S           machdep
diff -r 1646983e6841 -r dc92034706d5 sys/arch/i386/conf/GENERIC
--- a/sys/arch/i386/conf/GENERIC        Sat Jun 09 14:59:43 2018 +0000
+++ b/sys/arch/i386/conf/GENERIC        Sat Jun 09 15:12:21 2018 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: GENERIC,v 1.1156.2.9 2018/04/18 14:45:08 martin Exp $
+# $NetBSD: GENERIC,v 1.1156.2.10 2018/06/09 15:12:21 martin Exp $
 #
 # GENERIC machine description file
 #
@@ -22,7 +22,7 @@
 
 options        INCLUDE_CONFIG_FILE     # embed config file in kernel binary
 
-#ident         "GENERIC-$Revision: 1.1156.2.9 $"
+#ident         "GENERIC-$Revision: 1.1156.2.10 $"
 
 maxusers       64              # estimated number of users
 
@@ -32,6 +32,7 @@
 #options       PAE             # PAE mode (36 bits physical addressing)
 makeoptions    SPECTRE_V2_GCC_MITIGATION=1     # GCC Spectre variant 2
                                                # migitation
+options        SPECTRE_V2_GCC_MITIGATION
 
 # CPU features
 acpicpu*       at cpu?         # ACPI CPU (including frequency scaling)
diff -r 1646983e6841 -r dc92034706d5 sys/arch/i386/conf/files.i386
--- a/sys/arch/i386/conf/files.i386     Sat Jun 09 14:59:43 2018 +0000
+++ b/sys/arch/i386/conf/files.i386     Sat Jun 09 15:12:21 2018 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.i386,v 1.378.6.2 2018/04/11 14:23:30 martin Exp $
+#      $NetBSD: files.i386,v 1.378.6.3 2018/06/09 15:12:21 martin Exp $
 #
 # new style config file for i386 architecture
 #
@@ -85,6 +85,7 @@
 file   dev/cons.c
 file   arch/x86/x86/fpu.c
 file   arch/x86/x86/dbregs.c
+file   arch/x86/x86/spectre.c
 
 file   arch/i386/i386/mptramp.S        multiprocessor
 
diff -r 1646983e6841 -r dc92034706d5 sys/arch/i386/i386/machdep.c
--- a/sys/arch/i386/i386/machdep.c      Sat Jun 09 14:59:43 2018 +0000
+++ b/sys/arch/i386/i386/machdep.c      Sat Jun 09 15:12:21 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.c,v 1.782.6.5 2018/04/05 18:15:02 martin Exp $ */
+/*     $NetBSD: machdep.c,v 1.782.6.6 2018/06/09 15:12:21 martin Exp $ */
 
 /*-
  * Copyright (c) 1996, 1997, 1998, 2000, 2004, 2006, 2008, 2009
@@ -67,7 +67,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.782.6.5 2018/04/05 18:15:02 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.782.6.6 2018/06/09 15:12:21 martin Exp $");
 
 #include "opt_beep.h"
 #include "opt_compat_ibcs2.h"
@@ -1187,6 +1187,9 @@
 
        cpu_probe(&cpu_info_primary);
        cpu_init_msrs(&cpu_info_primary, true);
+#ifndef XEN
+       cpu_speculation_init(&cpu_info_primary);
+#endif
 
 #ifdef PAE
        use_pae = 1;
diff -r 1646983e6841 -r dc92034706d5 sys/arch/x86/include/cpu.h
--- a/sys/arch/x86/include/cpu.h        Sat Jun 09 14:59:43 2018 +0000
+++ b/sys/arch/x86/include/cpu.h        Sat Jun 09 15:12:21 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.h,v 1.71.2.5 2018/04/01 08:51:47 martin Exp $      */
+/*     $NetBSD: cpu.h,v 1.71.2.6 2018/06/09 15:12:21 martin Exp $      */
 
 /*-
  * Copyright (c) 1990 The Regents of the University of California.
@@ -357,6 +357,7 @@
 
 void cpu_pcpuarea_init(struct cpu_info *);
 void cpu_svs_init(struct cpu_info *);
+void cpu_speculation_init(struct cpu_info *);
 
 #define        curcpu()                x86_curcpu()
 #define        curlwp                  x86_curlwp()
diff -r 1646983e6841 -r dc92034706d5 sys/arch/x86/include/specialreg.h
--- a/sys/arch/x86/include/specialreg.h Sat Jun 09 14:59:43 2018 +0000
+++ b/sys/arch/x86/include/specialreg.h Sat Jun 09 15:12:21 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: specialreg.h,v 1.98.2.4 2018/04/18 14:14:17 martin Exp $       */
+/*     $NetBSD: specialreg.h,v 1.98.2.5 2018/06/09 15:12:21 martin Exp $       */
 
 /*-
  * Copyright (c) 1991 The Regents of the University of California.
@@ -104,10 +104,8 @@
 #define XCR0_Hi16_ZMM  0x00000080      /* AVX-512 512 bits upper registers */
 
 /*
- * Known fpu bits - only these get enabled
- * I think the XCR0_BNDREGS and XCR0_BNDCSR would need saving on
- * every context switch.
- * The save are is sized for all the fields below (max 2680 bytes).
+ * Known fpu bits - only these get enabled. The save area is sized for all the
+ * fields below (max 2680 bytes).
  */
 #define XCR0_FPU       (XCR0_X87 | XCR0_SSE | XCR0_YMM_Hi128 | \
                        XCR0_Opmask | XCR0_ZMM_Hi256 | XCR0_Hi16_ZMM)
@@ -405,11 +403,12 @@
 #define CPUID_SEF_IBRS         __BIT(26) /* IBRS / IBPB Speculation Control */
 #define CPUID_SEF_STIBP                __BIT(27) /* STIBP Speculation Control */
 #define CPUID_SEF_ARCH_CAP     __BIT(29) /* IA32_ARCH_CAPABILITIES */
+#define CPUID_SEF_SSBD         __BIT(31) /* Speculative Store Bypass Disable */
 
 #define CPUID_SEF_FLAGS2       "\20" \
                                "\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS" \
                                        "\33" "IBRS"    "\34" "STIBP"   \
-                       "\36" "ARCH_CAP"
+                       "\36" "ARCH_CAP"                "\40" "SSBD"
 
 /*
  * CPUID Processor extended state Enumeration Fn0000000d
@@ -643,6 +642,7 @@
 #define MSR_IA32_SPEC_CTRL     0x048
 #define        IA32_SPEC_CTRL_IBRS     0x01
 #define        IA32_SPEC_CTRL_STIBP    0x02
+#define        IA32_SPEC_CTRL_SSBD     0x04
 #define MSR_IA32_PRED_CMD      0x049
 #define        IA32_PRED_CMD_IBPB      0x01
 #define MSR_BIOS_UPDT_TRIG     0x079
@@ -660,6 +660,8 @@
 #define MSR_IA32_ARCH_CAPABILITIES 0x10a
 #define        IA32_ARCH_RDCL_NO       0x01
 #define        IA32_ARCH_IBRS_ALL      0x02
+#define        IA32_ARCH_RSBA          0x04
+#define        IA32_ARCH_SSB_NO        0x10
 #define MSR_BBL_CR_ADDR                0x116   /* PII+ only */
 #define MSR_BBL_CR_DECC                0x118   /* PII+ only */
 #define MSR_BBL_CR_CTL         0x119   /* PII+ only */
@@ -855,6 +857,9 @@
 
 #define MSR_LS_CFG     0xc0011020
 #define        LS_CFG_DIS_LS2_SQUISH   0x02000000
+#define        LS_CFG_DIS_SSB_F15H     0x0040000000000000ULL
+#define        LS_CFG_DIS_SSB_F16H     0x0000000200000000ULL
+#define        LS_CFG_DIS_SSB_F17H     0x0000000000000400ULL
 
 #define MSR_IC_CFG     0xc0011021
 #define        IC_CFG_DIS_SEQ_PREFETCH 0x00000800
diff -r 1646983e6841 -r dc92034706d5 sys/arch/x86/x86/spectre.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/x86/x86/spectre.c        Sat Jun 09 15:12:21 2018 +0000
@@ -0,0 +1,546 @@
+/*     $NetBSD: spectre.c,v 1.19.2.2 2018/06/09 15:12:21 martin Exp $  */
+
+/*
+ * Copyright (c) 2018 NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Maxime Villard.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Mitigations for the SpectreV2 and SpectreV4 CPU flaws.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: spectre.c,v 1.19.2.2 2018/06/09 15:12:21 martin Exp $");
+
+#include "opt_spectre.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/cpu.h>
+#include <sys/sysctl.h>
+#include <sys/xcall.h>
+
+#include <machine/cpufunc.h>
+#include <machine/cpuvar.h>
+#include <machine/specialreg.h>
+#include <machine/frameasm.h>
+
+#include <x86/cputypes.h>
+
+enum v2_mitigation {
+       V2_MITIGATION_NONE,
+       V2_MITIGATION_AMD_DIS_IND,
+};
+
+enum v4_mitigation {
+       V4_MITIGATION_NONE,
+       V4_MITIGATION_INTEL_SSBD,
+       V4_MITIGATION_INTEL_SSB_NO,
+       V4_MITIGATION_AMD_NONARCH_F15H,
+       V4_MITIGATION_AMD_NONARCH_F16H,
+       V4_MITIGATION_AMD_NONARCH_F17H
+};
+
+static enum v2_mitigation v2_mitigation_method = V2_MITIGATION_NONE;
+static enum v4_mitigation v4_mitigation_method = V4_MITIGATION_NONE;
+
+static bool v2_mitigation_enabled __read_mostly = false;
+static bool v4_mitigation_enabled __read_mostly = false;
+
+static char v2_mitigation_name[64] = "(none)";



Home | Main Index | Thread Index | Old Index