[src/netbsd-8]: src/sys/dev/usb Pull up following revision(s) (requested by j...

[martin <martin%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/59eb2b6a720b
branches:  netbsd-8
changeset: 434953:59eb2b6a720b
user:      martin <martin%NetBSD.org@localhost>
date:      Sat May 05 15:05:39 2018 +0000

description:
Pull up following revision(s) (requested by jdolecek in ticket #787):

        sys/dev/usb/xhci.c: revision 1.88-1.90
        sys/dev/usb/xhcireg.h: revision 1.10

add KASSERT() that sc_child* is set to NULL after child detach; just for
readability, it's not immediatelly obvious this is done in xhci_childdet()
no functional changes

trigger the softint processing on that child bus which is not detached yet
fixes PR kern/53066 by Martin Husemann

enable code to only trigger usb processing when EINT is set, to
avoid misinterpreting shared interrupt for another device

when clearing USBSTS, actually preserve the bits which spec requires to
preserve, and actually clear bit 1, which should be actually always
cleared to zero by spec

also #ifdef XHCI_DEBUG some unnecessary register reads
this should finally resolve PR kern/53066 also for Martin

diffstat:

 sys/dev/usb/xhci.c    |  39 +++++++++++++++++++++++++++++++--------
 sys/dev/usb/xhcireg.h |   5 ++++-
 2 files changed, 35 insertions(+), 9 deletions(-)

diffs (120 lines):

diff -r 04f598363754 -r 59eb2b6a720b sys/dev/usb/xhci.c
--- a/sys/dev/usb/xhci.c        Sat May 05 15:00:29 2018 +0000
+++ b/sys/dev/usb/xhci.c        Sat May 05 15:05:39 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: xhci.c,v 1.72.2.5 2017/12/21 21:53:31 snj Exp $        */
+/*     $NetBSD: xhci.c,v 1.72.2.6 2018/05/05 15:05:39 martin Exp $     */
 
 /*
  * Copyright (c) 2013 Jonathan A. Kollasch
@@ -34,7 +34,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: xhci.c,v 1.72.2.5 2017/12/21 21:53:31 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: xhci.c,v 1.72.2.6 2018/05/05 15:05:39 martin Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_usb.h"
@@ -582,12 +582,14 @@
                rv = config_detach(sc->sc_child2, flags);
                if (rv != 0)
                        return rv;
+               KASSERT(sc->sc_child2 == NULL);
        }
 
        if (sc->sc_child != NULL) {
                rv = config_detach(sc->sc_child, flags);
                if (rv != 0)
                        return rv;
+               KASSERT(sc->sc_child == NULL);
        }
 
        /* XXX unconfigure/free slots */
@@ -1247,7 +1249,16 @@
 
        ret = xhci_intr1(sc);
        if (ret) {
-               usb_schedsoftintr(&sc->sc_bus);
+               KASSERT(sc->sc_child || sc->sc_child2);
+
+               /*
+                * One of child busses could be already detached. It doesn't
+                * matter on which of the two the softintr is scheduled.
+                */
+               if (sc->sc_child)
+                       usb_schedsoftintr(&sc->sc_bus);
+               else
+                       usb_schedsoftintr(&sc->sc_bus2);
        }
 done:
        mutex_spin_exit(&sc->sc_intr_lock);
@@ -1264,24 +1275,36 @@
 
        usbsts = xhci_op_read_4(sc, XHCI_USBSTS);
        DPRINTFN(16, "USBSTS %08jx", usbsts, 0, 0, 0);
-#if 0
-       if ((usbsts & (XHCI_STS_EINT|XHCI_STS_PCD)) == 0) {
+       if ((usbsts & (XHCI_STS_HSE | XHCI_STS_EINT | XHCI_STS_PCD |
+           XHCI_STS_HCE)) == 0) {
+               DPRINTFN(16, "ignored intr not for %s",
+                   device_xname(sc->sc_dev), 0, 0, 0);
                return 0;
        }
-#endif
-       xhci_op_write_4(sc, XHCI_USBSTS,
-           usbsts & (2|XHCI_STS_EINT|XHCI_STS_PCD)); /* XXX */
+
+       /*
+        * Clear EINT and other transient flags, to not misenterpret
+        * next shared interrupt. Also, to avoid race, EINT must be cleared
+        * before XHCI_IMAN_INTR_PEND is cleared.
+        */
+       xhci_op_write_4(sc, XHCI_USBSTS, usbsts & XHCI_STS_RSVDP0);
+
+#ifdef XHCI_DEBUG
        usbsts = xhci_op_read_4(sc, XHCI_USBSTS);
        DPRINTFN(16, "USBSTS %08jx", usbsts, 0, 0, 0);
+#endif
 
        iman = xhci_rt_read_4(sc, XHCI_IMAN(0));
        DPRINTFN(16, "IMAN0 %08jx", iman, 0, 0, 0);
        iman |= XHCI_IMAN_INTR_PEND;
        xhci_rt_write_4(sc, XHCI_IMAN(0), iman);
+
+#ifdef XHCI_DEBUG
        iman = xhci_rt_read_4(sc, XHCI_IMAN(0));
        DPRINTFN(16, "IMAN0 %08jx", iman, 0, 0, 0);
        usbsts = xhci_op_read_4(sc, XHCI_USBSTS);
        DPRINTFN(16, "USBSTS %08jx", usbsts, 0, 0, 0);
+#endif
 
        return 1;
 }
diff -r 04f598363754 -r 59eb2b6a720b sys/dev/usb/xhcireg.h
--- a/sys/dev/usb/xhcireg.h     Sat May 05 15:00:29 2018 +0000
+++ b/sys/dev/usb/xhcireg.h     Sat May 05 15:05:39 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: xhcireg.h,v 1.9 2017/01/19 16:05:00 skrll Exp $ */
+/* $NetBSD: xhcireg.h,v 1.9.6.1 2018/05/05 15:05:39 martin Exp $ */
 
 /*-
  * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
@@ -106,14 +106,17 @@
 
 #define        XHCI_USBSTS             0x04    /* XHCI status */
 #define         XHCI_STS_HCH           0x00000001      /* RO - Host Controller Halted */
+#define         XHCI_STS_RSVDZ0        0x00000002      /* RsvdZ - 2:2 */
 #define         XHCI_STS_HSE           0x00000004      /* RW - Host System Error */
 #define         XHCI_STS_EINT          0x00000008      /* RW - Event Interrupt */
 #define         XHCI_STS_PCD           0x00000010      /* RW - Port Change Detect */
+#define         XHCI_STS_RSVDZ1        __BITS(5, 7)    /* RsvdZ - 5:7 */
 #define         XHCI_STS_SSS           0x00000100      /* RO - Save State Status */
 #define         XHCI_STS_RSS           0x00000200      /* RO - Restore State Status */
 #define         XHCI_STS_SRE           0x00000400      /* RW - Save/Restore Error */
 #define         XHCI_STS_CNR           0x00000800      /* RO - Controller Not Ready */
 #define         XHCI_STS_HCE           0x00001000      /* RO - Host Controller Error */
+#define         XHCI_STS_RSVDP0        __BITS(13, 31)  /* RsvdP - 13:31 */
 
 #define        XHCI_PAGESIZE           0x08    /* XHCI page size mask */
 #define         XHCI_PAGESIZE_4K       0x00000001      /* 4K Page Size */